Modules with 8 lines or less (e.g. 9401, 9402) use a dedicated line to transfer data from each of its inputs to the chassis backplane, and thus are capable of routing external signals as timing/triggering signals (e.g. to one of the counters on a cDAQ backplane). In contrast, modules with greater than 8 lines must transfer data serially to the chassis backplane and so the inputs are not available for routing.
Assuming you are using a newer cDAQ backplane (any cDAQ carrier except the 9172 or 916x), starting in DAQmx 9.3 you may configure a sample clock and acquire a buffered digital input on modules which transfer data serially (the 9403 I believe can sample at up to 1/7 us = ~142 kHz). So you could end up with a buffered array of data (e.g. [0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 1 1 1 ..]) which you could then parse to determine the number of edges. Of course, the pulses must remain high for at least one period of your sample clock to ensure that you are able to detect them.
If you are on cRIO you could configure something similar but the same restriction still applies--the limit is the maximum rate that data can be transferred serially from the 9403 to the backplane.
So, while it is probably possible to get what you want with the 9403 (depending on your pulse widths), a "parallel" module would be much more effective at detecting short pulses (if that were a requirement) and would be simpler to program as well--you could just configure an edge count task with a counter (assuming cDAQ). There is a Developer Zone article that has a list of all the C Series but it seems to be incorrect for several modules (maybe an NI employee will see this) regarding the serial/parallel nature of data transfer for DIO modules. I am not aware of any exceptions (and don't believe there should be any) to the rule of thumb that DIO modules with 8 lines or fewer are "parallel modules" and DIO modules with greater than 8 lines are "serial modules" (there are exactly 8 data lines on the DSUB connector between each module and the chassis).