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NI 9401 fpga reset method output glitch high

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Someone else has posted on this problem but no response from NI

 

http://forums.ni.com/t5/LabVIEW/FPFA-Reset/m-p/2582555/highlight/true#M777501

 

Some electronics got fried because when calling the the reset method on the FPGA the outputs go high for about 100 ms (way longer than they should have been...)

 

Is there a reason the FPGA reset method on CompactRIO works this way? I have not investigated how it works with other modules than the 9401.

 

Could this behavior please at least be documented in the help somewhere? It is pretty important.

 

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Hi,

 

There does seem to be some previously documented glitches concerning the NI 9401 and incorrect output from the module. It seems this also occurs if the cRIO goes to sleep or if you download an FPGA VI after one has already been loaded. http://digital.ni.com/public.nsf/allkb/0DB2F634C2C7AF578625767900620E19?OpenDocument

 

Could you describe the system you're using? What type of cRIO and what version of LabVIEW you're using? 

 

I can try and reproduce the issue on our end and get it documented in addition to reporting the bug. 

 

 

Daniel Parrott
Software Product Marketing - Data Management & LabVIEW
National Instruments
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Thanks, I definitely did not see that KB. Ought to be in the reset FPGA method help IMO. This is my system FWIW

 

cRIO 9074 + cRIO 9144 EtherCAT chassis Running a hybrid-mode FPGA bitfile on the 9074.

 

 

Capture.PNG

 

modules:

Capture.PNG

 

Capture.PNG

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Thanks for all of the info. I'll have to get the hardware together for the basic test (just the cRIO 9074 and the NI 9401 module), but one I do I'll test it out to make sure I see the same glitch you do. This might take a few days, but I'll let you know once I do and then we can make sure at the very least this gets documented in the right places.

Daniel Parrott
Software Product Marketing - Data Management & LabVIEW
National Instruments
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Solution
Accepted by topic author MarkCG

I finally got the hardware setup and was able to test a 9074 with a 9401 module. When using the FPGA Reset method, it indeed does output for around 100 ms. I'll be making sure this gets documented and that KB gets updated. I'll also be sure to get in touch with the right people to see if we can get this put in the 9401 help files where it's more visible.

 

Thanks for bringing this to our attention!

Daniel Parrott
Software Product Marketing - Data Management & LabVIEW
National Instruments
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Thank you! Much appreciated.

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