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Measure digital input using sample clock

Hello everyone,

 

I tried the sample project 'Digital - Continous Input.vi' from the examples of LV. I want to read in digital input and also use the sample clock property from the Daqmx palette (I need the t0 and dt of the digital signal). 

 

For every clock I used (onboard, ../di/SampleClock) I get the error

 

-89120: at property node Daqmx Timing (arg1)

Property: Sample clock.ActiveFlank

Source: PXI1Slot7

Source: Onboardclock

 

What is the correct clock property to measure digital input? I tried the same approach as for analog signals (samplerate, continous)

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I also tried the change example from this . Now I get:

Error: -200284 -> Some samples can not be read.

 

I tried adjusting the the sample rate (from 10 to 100000) and still get the same error. Are there some missing properties that need to be set first?

Why does it differ from the analog aquistion?

 

EDIT: After removing the clock I can continously measure a port, but I have no time reference from the system. I get t0 but not the samplerate of the measurement

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1. What device are you using?  Your first post makes me suspect you have a device where the Digital IO tasks can't generate their own sample clock. This includes most common PXI devices.  Exceptions include 63xx X-series MIO boards and dedicated high-speed DIO boards.

 

2. Your second post suggests that your board probably *does* support digital change detection.  In this mode sampling happens only when configured lines change state - "sample rate" isn't really meaningful. 

   The error you're getting is a timeout error which means you didn't get enough digital transitions to generate the # samples you asked for.

   The most common boards that can do change detection but can't make their own DIO sample clock are M-series MIO boards (62xx series).  I know there are also 65xx boards, and 61xx MIO boards which support change detection but which might also not be able to generate their own DIO sample clocks.

 

I know for sure that M-series board support "correlated DIO" where they use an externally-supplied sample clock.  This clock can be generated on-board with a counter pulse train task or can be exported from an AI or AO task.

 

 

-Kevin P

CAUTION! New LabVIEW adopters -- it's too late for me, but you *can* save yourself. The new subscription policy for LabVIEW puts NI's hand in your wallet for the rest of your working life. Are you sure you're *that* dedicated to LabVIEW? (Summary of my reasons in this post, part of a voluminous thread of mostly complaints starting here).
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@Kevin_Price wrote:

1.  Your first post makes me suspect you have a device where the Digital IO tasks can't generate their own sample clock. This includes most common PXI devices. 


I did not know that. My card is a PXI-6220.

 

Currently I read the signals via a loop with a sample rate of 10k. I let LV generate a timestamp before and after the 'Read' function. Now I can calculate my stepsize. This is not my ideal solution since the timestamp does not directly come from a trigger of my measurement card, but from the software loop after finishing some code blocks (execution time may vary).

 

I also compared it with a good oscilloscope and noticed that timeframe does not always match. The timestamp at the start is equal, but after a few measurements the stoptime may vary between 10-25ns @10k. The error for dt is low enough I think.

 

I will try to vary the samplesize and plot my error function to determine if this is a constant error (therfore higher sample rate leads to a smaller error) OR a cummulitive one.

 

Is there a better way to determine the timeframe of my datapackage even without a designated clock for digital IO?

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I logged the time-difference between my measurements with increasing samplerate. The digital signal is generated via a pulse generator which is triggered via the osci. With this setup I got the following table

Samplerate    dt [s]             Error

1000              2.0029E-6    17%

2500              2.4003E-6    16%

10k                2.2001E-6    9%

25k                2.2401E-6    4%

50k                2.2200E-6    3.8%

100k              2.1801E-6    1.9%

 

With a sample rate of >25k I am already in the same error range as my osci (input 1Ghz). This will be good enough for my measurements. Only dirty part is that the stop time is set after the signals are processed (output wire of the NChannel_NSamples VI) and therefore is dependent on the instance of the VI being handled by LV and not by the measurement card itself

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I don't understand what you're trying to characterize here:

 

Samplerate    dt [s]             Error

1000              2.0029E-6    17%

2500              2.4003E-6    16%

10k                2.2001E-6    9%

25k                2.2401E-6    4%

50k                2.2200E-6    3.8%

100k              2.1801E-6    1.9%

1. whatever you mean by "dt", it appears pretty much constant across a wide range of sample rates.  

 

2. the % error calcs don't add up.  You seem to be comparing a time error with a nominal frequency.  You should compare time error with a nominal *time*.   (But I'm not yet sure how this "error" is defined and measured, so not yet sure if it's even meaningful.)

 

 

-Kevin P

 

CAUTION! New LabVIEW adopters -- it's too late for me, but you *can* save yourself. The new subscription policy for LabVIEW puts NI's hand in your wallet for the rest of your working life. Are you sure you're *that* dedicated to LabVIEW? (Summary of my reasons in this post, part of a voluminous thread of mostly complaints starting here).
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