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Large number of samples through FIFO - avoid overflow on target buffer

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Accepted by topic author ManuelQ

Dear Dave,


yes you are right. Hiowever, I want to stack waveforms, basically.


Therefore I was looking for a way to store a waveform for one cycle of SCTL. Below a screenshot of the approach using memory, which does not work, because of multiple request issues.... I store 2 different waveforms in the memory (thus true and false case. picture 1 and 2), read and add sample by sample, and finally transfer the stacked waveform to the host.


Replacing the memory with arrays did not work either (see above). So I circumvented the need to store the waveform on the FPGA by NOT stacking them, but put them all as a long chain in the memory (it should fit in the block memory) and use the FIFO to transfer them to the host and repeat the whole procedure. 


If you have any other idea to store a waveform around 2000 elements long on the FPGA between cycles of SCTL I would like to hear it otherwise I can live with the aforementioned solution.


Thank you very much again!


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