Labview FPGA DRAM Retrive DATA method ISSUE , HELP !!!

[Cobmetal]

Im using an kintex 7 flexrio 7931,

i've built a state machine for loading binary files into the dram , for other further purposes.

in the next stage i have to read this loaded data into the a FIFO , and send out to extrenald device.

i'm expiriencing some strange behaviour : im using an SCTL , and inside it running a state machine , when the method of "Retrieve DATA" is inside the sctl and outside the State machine , i can read the data from the DRAM , when the method of "Retrieve DATA" is inside the SCTL and inside a specific stage (READ DRAM) of the state machine , i cant read data from the DRAM .

pics included.

Why is that ?

[Intaris]

Since the request address and read data are asynchronous (in hardware) then they should not be in the same state unless the state change is triggered by the read operation being successful (and not the request operation).  This is not the case, you switch state based on the request operation which is not going to work.

[Cobmetal]

So , if i understand you right , i need to count the amount of addresses , and count the ticks of the "output valid" of the DRAM , check if its equal , and then go the next state ?

maybe you have some good example , or just can modify my code ?

Thanks in advance.

[Intaris]

Can't open your code, I've only got LV 2015.

Let your code request addresses as usual, generate a trigger to indicate when the requests havew all been issued.

Then do the same for your reads, set a trigger when all reads are finished.

When BOTH triggers are true (latching of course) move to the next stage.

So in essence, yes you need to count both and then continue.

[Cobmetal]

Hi , i understood what do you mean , but without success to implement it.

i upload a LV15 , if u just can the modifications , it will be awesome.

Thank u again.

[Intaris]

---

@Cobmetal wrote:

i upload a LV15 , if u just can the modifications , it will be awesome.

---

I'm sure it would be... Without having hardware to test with, my modifications would be next to useless.  Have you tried monitoring the number of samples received fromt he Read node?

[David-A]

You should consider looking at the flexrio examples that demonstrate how to use DRAM. Go the to example finder and browse to Hardware Input and Output>>FlexRIO>>External Memory. You'll find several examples there. A good place to start is the Getting Started - External Memory example. The 7976 fpga is the one you'll want to look at since that target has the same type of dram as the 7931. 

[Cobmetal]

Hi,

These examples really helped , especially the "memory integrity test" , i based my code on it with few modification as i need, but still im expiriencing some difficultes with the code . The code main purpose is to read binary files to the dram , and then read it back from the dram to a binary file(this step is a part of full project). Im controling the Target via the host , so the problem is : im success to read binary file into the dram , and then read it back from the dram to a file, but when im trying to read the second file to the dram , and read it back from the dram to a file , using a status of the dma , im seeing that the Target-To-Host DMA is empty , and i dont know why is that.

Im attaching my code, maybe if someone can look on it and give me some tips.

Thank you again .

[Cobmetal]

Someone?

[David-A]

Try running the fpga in simulation mode and loading a small binary file. The advantages of simulation mode are you can place probes, run with highlight execution, and you can use the sampling probe.

Set the fpga target to execute in simulation mode and set the open fpga reference.vi on the host vi to point towards the top level fpga vi that is being simulated. On the fpga vi you'll need to reduce the size of the dram to less than 1 mb. And since you're using a Controller for FlexRIO you'll need to make sure the host vi is executing from the My Computer context of your project rather than the RT target. 

Attached is the memory integrity example that's configured to run in simulation mode on a 7931.