Labview 2019 - State Machine to Verilog or VHDL conversion

[rajatsewal]

I would like to convert a state machine vi into verilog or vhdl code.  Is there a labview add-on that can do this?

[RavensFan · Accepted solution]

No

[OliverZT]

Can I transfer Verilog to State Machine in Labview? I think it is not simple to design State Machine by using graphics programming.

[RTSLVU]

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@OliverZT wrote:

Can I transfer Verilog to State Machine in Labview? I think it is not simple to design State Machine by using graphics programming.

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A State Machine is one of the simplest programming architectures you can program in LabVIEW.

Show us what you have done so far and we can probably help you.

also I made a simple state machine tutorial for a coworker a while back, take a look at it.