02-11-2020 04:39 PM
I would like to convert a state machine vi into verilog or vhdl code. Is there a labview add-on that can do this?
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02-11-2020 06:23 PM
No
02-12-2020 09:17 AM
Can I transfer Verilog to State Machine in Labview? I think it is not simple to design State Machine by using graphics programming.
02-12-2020 09:46 AM - edited 02-12-2020 09:58 AM
@OliverZT wrote:
Can I transfer Verilog to State Machine in Labview? I think it is not simple to design State Machine by using graphics programming.
A State Machine is one of the simplest programming architectures you can program in LabVIEW.
Show us what you have done so far and we can probably help you.
also I made a simple state machine tutorial for a coworker a while back, take a look at it.