LabVIEW FPGA Memory Compile Time Constants

[tcapuano-aps]

Hi All,

I am trying to circumvent the limitation that LabVIEW FPGA doesn't support 2D Arrays, by leveraging memory. Right now, I have to set the depth of the memory manually, such that when I change the 2D Array dimensions, I need to change my #rows constant, #columns constant, and #elements constant (the memory size). I am looking for a method that allows me to set the memory size based on compile time constants.

Does anyone know anything?

Thanks,

Tom 

[GerdW]

Hi Tom,

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@tcapuano-aps wrote:

Right now, I have to set the depth of the memory manually, such that when I change the 2D Array dimensions, I need to change my #rows constant, #columns constant, and #elements constant (the memory size). I am looking for a method that allows me to set the memory size based on compile time constants.

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Can you explain the term "compile time constants"?

What is the difference of "compile time constants" to "constants in your code, evaluated when compiling the FPGA code"?

[tcapuano-aps]

Hello,

Thanks for the reply.

I guess there really isn't a difference in this context.

I can't find a method to create a Memory using Block Diagram defined size, so I am hoping that there is some other nob I can spin at the project level. Perhaps, I can implement a Conditional Disable Structure with project defined symbols.

Another example of a similar problem is that the Array Size of a Fixed Size Array is not a constant according to the compiler.

Regards,

Tom

[GerdW]

Hi Tom,

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@tcapuano-aps wrote:

I can't find a method to create a Memory using Block Diagram defined size,

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A memory block is created and defined in the project explorer. You can only use that memory block in your FPGA VI…

Which memory block sizes are we talking about?

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@tcapuano-aps wrote:

Another example of a similar problem is that the Array Size of a Fixed Size Array is not a constant according to the compiler.

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The result of the ArraySize function is a value (in a wire). Why should it be a "constant"?

[tcapuano-aps]

Hi,

I agree that memory blocks are created and defined in the project explorer. This is the fundamental problem that I am trying to circumvent. The size of my memory block is a function of the #row and #columns of my matrix. Therefore, I would like to set the size of my memory block based on an equation that is resolvable at compile. This will make my API much more flexible.

I disagree with your argument that the size of a fixed array shouldn't be constant because it travels on a wire. All constants in LabVIEW still travel on wires. For comparison, this is how you can implement the behavior I would like in C. (https://stackoverflow.com/questions/3388656/how-to-determine-the-length-of-an-array-at-compile-time)

At this point, I guess these are more feature requests than anything else. I am just find it very difficult to implement good design practices in LabVIEW FPGA, given the limitations.

Another example is that there is no function that can initialize a Fixed Size Array.

Thanks,

Tom

[GerdW]

Hi Tom,

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@tcapuano-aps wrote:

The size of my memory block is a function of the #row and #columns of my matrix. Therefore, I would like to set the size of my memory block based on an equation that is resolvable at compile. This will make my API much more flexible.

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Nice ideas: did you post them in the FPGA-IdeaExchange?

Again: which memory block sizes do we speak about?

Which API functions are we talking about?

Can you attach an example implementation of the desired API?

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@tcapuano-aps wrote:

For comparison, this is how you can implement the behavior I would like in C.

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I guess that C code will not create code for a FPGA target?

I still don't get the point of reading the size of a FixedSizeArray, create by you at edit time!? You already know its size, don't you?

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@tcapuano-aps wrote:

Another example is that there is no function that can initialize a Fixed Size Array.

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Simply place an array constant in your FPGA code and set its size: now you have your array initialized…

[JensG69]

I think Tom would like is to define the size of his FPGA memory by e.g. a "conditional diable symbol" before he runs his FPGA compilation...

Not sure if that is possible or not...

Regards, Jens

[Elias_Faraclas]

This would indeed be a very nice feature.