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LabVIEW FPGA I/O Configuration

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Hello all!


I only recently began using LabVIEW and the FPGA module is confusing me a lot. I am trying to accomplish something as simple as turning an LED on and off at a controlled time. I have the while loop delayed with a count, but the board I am using, the USB-7845R connected to a board of inputs, uses I/O pins rather than DI or DO pins like in the tutorials. 


I really would appreciate if someone could point me in the direction of how to configure my DIO23 pin. I want to be able to read and write values to the pin, which is controlled an LED (1 = On, 0 = Off).


I have attached what little I have as a screenshot - I apologize that it is not much, but I am really struggling on it. Thank you in advance for the help.


The Arduino code would look something like this -


pinMode(DIO23, OUTPUT);


void loop () {

digitalWrite(DIO23, LOW);


if(digitalRead(DIO23) == LOW){

digitalWrite(DIO23, HIGH);}






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Message 1 of 6
Accepted by topic author Cameron9438
06-12-2018 08:43 PM

You need to negate the state of your output every iteration - so ideally you would store the state at the end of each iteration in order to retrieve it the next (ie shift register). You also need the state to change every 1000ms (example) so you would need to prevent the loop from performing the next iteration until that time has expired (Wait ms)


That, keeping your output node (but as Write) and removing the rest of the I/O nodes will get you what you need. As a quick example:


2018-06-13 13_33_00-Clipboard.png


It can take some time to acclimatize to looking at code graphically rather than text (sequentially). 

Message 2 of 6

Thank you so much for your help - when I upload it tomorrow to the board, I will reply if I have any questions.



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Message 3 of 6

It worked perfectly - I also implemented a counter to see how many times it has flashed.


I think my main question for I/O ports is why is there a read / write function if you simply use a block that has an output facing right for inputs and a block that has an input facing left for the outputs?

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Are you referring to the "Read I/O" and "Write I/O" nodes under the User-Controlled I/O sampling palette? That name of the palette is your first clue (as is the help file). This allows you to create higher-speed I/O generation/acquisition as compared to the standard I/O nodes by creating your own sampling clock. You can read a good description on this feature here: I've never actually used this feature but there are probably others here who have.


Typically the majority of projects work just fine within the performance boundaries of the standard I/O nodes and they are certainly easier to use, as you stated. However there are certainly some projects where a higher sampling interval can be useful.


If you are planning on doing a lot of FPGA work then I can also recommend the FPGA Developers Guide here: It doesn't describe some of the newer FPGA features but its certainly a good read to really come to grips with some of the intricacies beyond the hand-holding tutorial content NI has online (which I assume you have looked at eg.

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Message 5 of 6

Yes - I found the videos extremely helpful in getting a generally idea of how to work through problems with LabVIEW. In terms of the User-Manual it goes extremely in depth on areas that are not always relevant to what my problems are; that is why I find the forum works great.


I unfortunately have another question, but since it is not related I will make a new thread about it - Thanks a ton for the help! It's nice to have someone answer very simple questions that I would usually ask a professor if I was in lab.

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