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We appreciate your patience as we improve our online experience.
11-02-2009 07:44 AM
I am running:
LabVIEW 8.6.1
NI-RIO 3.1.1
cRIO - 9014
cRIO - 9113
Windows XP 32bit
In my RT code I have a DMA FIFO write with an infinite timeout within a timed loop. I am using the timed loop to control the execution speed of some other code as well as the DMA write. As soon as the FIFO fills and waits the Compact RIO crashes. I am able to ping it and the FTP server works as well, so this seems like an issue with LV RT?
Is this a bug or poor handling of an error generated by the timed loop?
11-02-2009 08:32 AM
Hi Will
Any chance you could post your RT code so we could have a look?
Best Regards
David
NISW
11-02-2009 08:53 AM
You can find the loop in question attached. Unfortunately I cannot disclose too much of the code.
The code works fine if I use a while loop and just place a wait timer in the loop.
The Write FIFO global is for an asynchronous event and the TCP connection is dropped and reestablished frequently to a system I do not control.
11-02-2009 09:15 AM
Hello Will,
Would it be possible to check if anything is printed to the controller's console as a result of the crash?
You can follow these instructions. http://digital.ni.com/public.nsf/allkb/354A5124E6A667988625701B004A77CD
Thanks,
Sebastian
11-02-2009 09:27 AM
I tried that as well. The console shows the boot up and only reports the booting of LabVIEW:
"Welcome to LabVIEW Realtime 8.6.1" or something to that effect.
The console shows nothing else after this point.
I tried checking log files on the cRIO using FTP or the LabVIEW Project manager but nothing is showing up when the crash happens. Unless I don't have some log settings set properly?
I could use some console writing VIs to help debug but have already located the offending loop.
11-02-2009 09:45 AM
Hi Will
Had a quick look at your code and I have two comments. The TCP listen.vi eats a lot of CPU. That could be a cause of the crash. If memory serves me right there is another way to implement the same function at a lower level. Will look into that. Also you never do any checking that you actually get the correct data from your TCP read.vi and that the unflatten from string workes as it should. That could cause a problem if the conversion fails you try to write crap data, basically nothing to the FPGA, causing the FIFO to wait. Implement some eror handling in the unflatten from string and see that it works like it should.
Best Regards
David
11-03-2009 07:40 AM
David,
I added some error checking on the Flatten from String but it did not help.
It seems LV RT does not like having blocking functions within a timed loop. I have not had the chance to do error checking on the loop itself, missed periods and the like.
Has anybody been able to reproduce this issue?
11-03-2009 11:39 AM
Hello Will,
Given that the while loop works as expected, it certainly seems possible that the timed loop doesn't handle the infinite timeout well. Assuming your FPGA code is reading elements out of the FIFO, it seems reasonable to expect that the loop will resume. I'll try to reproduce this later, and if I can a CAR may be in order.
As a solution, you can try putting the write in a loop and using a non-infinite timeout. You can then check the error terminal to see if a timeout occured. If error -50400 is reported; try the write again, if not exit the loop. This also has the advantage that you can check other stop conditions at this time.
Sebastian
11-03-2009 12:31 PM