LV FPGA 2009 PID.vi Scaling Question

[bones349]

Hey All,

I have been using the PID.vi in the FPGA module in LV 8.5.  I have upgraded to 2009, and the PID vi is different now.  Instead of taking in I16 values for the Kc, Ki, Kd  value, it now uses FXP 16 bit, with an 8 bit integer value.

I'm messing around with my Host now, trying to figure out how to scale the values properly.  I was using the "niFPGA ScalePIDGains.vi" from the "Using Discrete PID - R Series" example.  This example is the same in LV 2009 compared to 8.5, in that it still scales the values to I16.  How would you properly scale the values to the 16 bit FXP value that the FPGA vi is expecting?

Thanks

[Ben_S · Accepted solution]

Bones349,

Here is some great information on the Fixed-Point data type. You could try using the To Fixed-Point Function to convert various other data types to the fixed point data type, or you can try wiring the I16 straight into the PID VI as it appears to do the conversion for you.

[bones349]

Thanks!

I figured it out.  I was actually making a stupid mistake on the HOST, when calculating/converting the Set Point value for the PID.  I thought that was working fine, and thought it was the PID gain values that were messing things up.  Instead, I was sending the PID loop an unattainable SP value.