Is it possible to design filters on the FPGA which are reconfigurable on the fly?

[hongsiying]

Hi everyone,

I am wondering whether it is possible to design multi-channel filters on the FPGA which are reconfigurable on the fly? For instance, is it possible to have X bandpass filters in one iteration and Y bandpass filters with different specifications in the next iteration without recompiling the FPGA code? Is there a straightforward way to achieve such a design?

I've built such flexibility into the RTOS (where each iteration has different filter parameters) but was hoping to implement it on the FPGA as well. 

If anyone could provide any insights as to whether or not such a design is feasible, it would be greatly appreciated. 

Thanks in advance for your help!

Steven 

[srm@viewpointusa.com]

I am not sure what you mean by iteration in this case but you can change the filter coeffs of fpga filters on the fly if needed.

[hongsiying]

Sorry I didn't see your message earlier but thanks for the reply stu! I was wondering how I would change the filter coeffs on the FPGA without recompiling the entire thing. I'm currently using the Digital Filter Design tookit to determine my coefficients but it seems like this approach requires a new compile every time I want to change the filter parameters. Any help that you could provide is greatly appreciated!

Thanks!

Steven 

[Austin_S · Accepted solution]

Hi Steven,

How are you trying to generate the FPGA code for this filter- are you using the IP Generator?

If so, this KnowledgeBase article discusses setting the coefficients for multi-channel filters to be changed on the fly.  There's also a nice example in there as well.

Also, if you're using this IP Generator, this Help document describes the More Options box that has the ability to change the coefficients to 'reloadable' so that you can change these on the fly there too.

[hongsiying]

Hi Austin,

Thanks very much for the resources, this is exactly what I was looking for!

On a slightly unrelated note, one thing that I'm having trouble with is changing the IO's on the multi-channel filters on the code from the KnowledgeBase article. The code is designed to work with PXI-7831R and my system uses a PXIe-7965R which is connected to an NI5781 IO Module. When I change the IO's from the standard connectors to the IO Module IO's, labview allows me to compile the code but during compilation I'm getting an error which says "Compilation Failed due to Xilinx Error". 

I've followed the instructions here: http://digital.ni.com/public.nsf/allkb/BBD7A87F2ADC2028862577FB005F6B19, but this hasn't seemed to fix this. 

Do you think that there might be a compatability issue between the IO Module IO's and the Connector IO's? What might I do to fix this problem?

Thanks again for your help!

Best,

Steven 

[Eli_S]

Hi Steven,

When exactly are you getting that error? Do you know during which step of the compilation you are getting that error? Would it be possible for you to attach a screenshot of the error? Also, if you can attach the compilation log that would be very helpful in figuring out what is happening.

Regards,

[hongsiying]

Hi Eli,

Turns out it was a problem with the NI 5781 IO as I found out through this link http://digital.ni.com/public.nsf/allkb/DDA7A5F9C331D23A862578F8004F7705

Everything seems to be resolved now and working!

Thanks,

Steven 

[YOUNG1111]

Hi everyone,

I know it has been a long time for this discussion, I hope some of you can see this message. I have encountered similar needs, but，the link of KnowledgeBase articlementioned by Austin has expired, I hope someone can provide a valid link or article content.

Thanks very very much！！

Young

[Terry_ALE]

From the list of Xilinx IP https://zone.ni.com/reference/en-XX/help/371599P-01/lvfpgahelp/fpga_xilinxip_descriptions/ you can use a Xilinx FIR Compiler which supports this.  See Xilinx's website: https://www.xilinx.com/products/intellectual-property/fir_compiler.html and the PDF: https://www.xilinx.com/support/documentation/ip_documentation/fir_compiler/v7_2/pg149-fir-compiler.p...

The version of the FIR Compiler will be noted in the LabVIEW FPGA functions palette.

Which is your version of LabVIEW and NI FPGA board being used?

[YOUNG1111]

HI Terry_ALE

THANKS A LOT!!!!

This will be very helpful to my work.

YOUNG