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How to stop DMA FIFO's on FPGA?

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Hello,

can someone tell me how to stop DMA Fifos like Target to Host Fifos on the FPGA Level?

The method node "stop Fifo" on host only clears the fifo buffer on the host side. The Fpga fifos are still running.

 

To reset the whole fpga is not possible, because the other running code is important for the measurement control.

 

Thanks a lot 🙂

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Accepted by topic author B.Buerkert

Hi B.,

 

you might stop to write into the FIFO with a boolean control wired to a case structure...

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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