How to optimize this labview fpga vi??

[Dragis]

You shouldn't need to insert pipeline registers if you are writing code within a While Loop. The pipeline stages are mostly useful within a Single-Cycle Loop where you (as the user) must explicitly define where the registers are located.

[mangood]

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@Dragis wrote:

You shouldn't need to insert pipeline registers if you are writing code within a While Loop. The pipeline stages are mostly useful within a Single-Cycle Loop where you (as the user) must explicitly define where the registers are located.

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thank you

Yes this is what I mean exactly..

We shouldn't need to insert pipeline registers if you are writing code within a While Loop

but I am confuse because the second image was captured from ni tutorial

http://www.ni.com/white-paper/3749/en

so we need to be sure that must we not put any feedback register to reduce path or make pipeline because we already have a reg between element ??

best regards

[1105]

hi

 i have completed vi for my project.now i want to port it into virtex 4 fpga.What are the steps i should follow so that i can copnvert the labview vi into fpga supported format.

[BradM]

Unfortunately, LabVIEW FPGA does not support hardware other than NI hardware and the Xilinx University Program Spartan 3E starter kit (for academic purposes only)