12-28-2016 02:20 PM
Hello All I've been working on a proof of concept for a project I'm taking over. The current build was done on a MYDAQ and they use the DAQmx tools for signal receiving and transmitting. I wanted to build my own proof of concept as well as my own VI's for sending and receiving analog signals. I'm working on the SB-RIO 9637 and I've used some sample code from some examples in the Help section of labview. I basically want to do exactly what this guy does in this video series that NI put together.
Here the link: https://www.youtube.com/watch?v=q3-WGrnVnxM
I want to be able to generate a sine wave on the FPGA just like he does and I want to send out an appropriate signal that can be read by osiclloscopes as a correct sine wave and I want to receive signals as well. I'm currently learning how to use DMA FIFO and the analog inputs and outputs as well. However in this series of videos I gave the link to they are extremely vague on some of they keys aspects.
I just don't understand how to effectively transmit and receive the sine-wave back in the proper form. I have attached the code I modified here from the examples and trying to mimick the gentlemans videos but I get nothing passing through like it should. I hope some senior developer/ labview expert on here can come in and take a quick look at my code after watching those videos and tell me where I'm going wrong. Better yet show me a better example code that I can use a proof of concept. Thanks!
Solved! Go to Solution.
12-29-2016 07:39 AM
Also I'm not sure if it has to do with the data-type of the terminals for the Analog Inputs and outputs being FXP or if it's somethign that can easily be switched. I have no idea.
12-29-2016 11:43 AM
Hi,
The Analog Sinewave.vi is not contained in the zip folder
12-29-2016 12:36 PM
Hey Dohnjoe,
thanks for looking. Sorry I didn't even realize. I've reattached the file here.
12-29-2016 01:41 PM
I think this is the reference library you are looking for. They made it highly analogous to daqmx
12-29-2016 01:51 PM
Goodness that's even better! That's essentially what I'm trying to do is merge this new software that was written for MyDAQ and repurpose it on an SBRIO 9637 if these are the same thing as the DAQMX files then I think we might be in good shape! Nice FIND!
01-04-2017 11:04 AM
@nanocyte wrote:
I think this is the reference library you are looking for. They made it highly analogous to daqmx
http://www.ni.com/example/31206/en/
nanocyte,
This seems like I should be able to implement pretty easily for the SBRIO 9637. However it's only for the acquisition. Is there anything similar for the RIO that's like this tool kit but for the transmission of a waveform? I wan't to replace the DaqMX transmissions VI's as well.
01-04-2017 11:21 AM
The above post is me as well sorry if there's confusion. 😄
01-04-2017 01:07 PM
Interesting. I guess they only did it one way. Going the other direction isn't that different. Add the module under the target FPGA, drop the node in your FPGA VI loop, use a Host to Target FIFO instead of a Target to Host FIFO, drop your waveform into the FIFO from the RT...etc
There's a decent example in
Help->Find Examples->CompactRIO->Data Transfer and Storage->Host to Target DMA -> Streaming Data (DMA).lvproj
Here's an example with the R series
http://www.ni.com/example/29861/en/
01-04-2017 01:40 PM - edited 01-04-2017 01:40 PM
Okay I will try to see If I can actually output a waveform using this method. I will need to hook up an oscilloscope to verify. Do you recommend I use the FPGA sine wave generator to output the waveform and just skip the FIFO altogether? Also are you sure there's not a pre-written toolkit for transmission of waveforms thats similar to the MyDAQ?
@nanocyte wrote:
Interesting. I guess they only did it one way. Going the other direction isn't that different. Add the module under the target FPGA, drop the node in your FPGA VI loop, use a Host to Target FIFO instead of a Target to Host FIFO, drop your waveform into the FIFO from the RT...etc
There's a decent example in
Help->Find Examples->CompactRIO->Data Transfer and Storage->Host to Target DMA -> Streaming Data (DMA).lvproj
Here's an example with the R series
http://www.ni.com/example/29861/en/