How do I set "Data Rate" on sbRIO 9636?

[Mark_L]

I am attempting to use Sample Project "LabVIEW FPGA Waveform Acquisition and Logging on CompactRIO".  

My target is not a cRIO.  Instead it is an sbRIO 9636 from the BYOES class.  I do not have a cRIO.  

In FPGA Main.vi there is a property node called Mod1 Data Rate.  It has a broken wire.  I put it in a disable case.  Not surprisingly the code runs for awhile then the FIFO overflows.  

Would you help guide me so I can replace the property node with the correct information to cause the FPGA to run at the right rate to keep the FIFO from overflowing?

[Jacobson-ni · Accepted solution]

If you are just using the built in AI then you don't set the data rate by a property node. This is only required by delta sigma modules. The sampling rate of other AI is just determined by how fast the loop iterates so the way to acquire at some specified rate would be to use the loop timer function.

The overflow is probably because there isn't a loop timer and the code wasn't designed to handle data coming through the FIFO that fast

[Mark_L]

Thank you Matt.

Your answer makes sense and I can go on from here.