Host Memory Buffer for PC to FPGA Communication

[Rahulbala]

I am using sbRIO 9627.I am trying communicate between PC and FPGA using Host Memory Buffer.In the process , I am facing a couple of errors as follows

1.libhmdlv.dll missing.

2.Error 25 : External code not present.

Thanks in advance !!!

[GerdW]

Hi Rahulbala,

why do you need a PC when you want to communicate from your sbRIO (RT side) to the FPGA on the very same sbRIO???

When you need help with your specific VIs you should attach them!

[Rahulbala]

Hi GerdW,

Thanks for your reply !!!

I am performing image processing in the PC and I want to communicate with FPGA for image ID which is generated by the FPGA when the camera is triggered .I have attached the block diagram for your reference.

Continuous Image Capture

FPGA triggers the camera and generates the Image ID.

input to PC : Image + Image ID.

output from PC : Result + Image ID

[GerdW]

Hi Rahulbala,

send the "image ID" from your FPGA to the sbRIO RT. Then send the ID from sbRIO RT to PC host.

That's the usual way (as is explained in all those example projects coming with LabVIEW)!

[Rahulbala]

Hi GerdW, I am aware of the alternate methods. Is there a way to communicate between PC and FPGA? Thanks for your reply Regards Rahulbala

[GerdW]

Hi Rahulbala,

Is there a way to communicate between PC and FPGA?

Yes, sure!

As the FPGA is built into the sbRIO and the sbRIO is a computer of its own you need to have your PC communicate with the sbRIO and have the sbRIO handle the communication between RT and FPGA…

This is explained in the example projects coming with LabVIEW!

[crossrulz]

Trust me, you want the RT layer to manage the connection between the cRIO and the PC.