We recently purchased FlexRIO 7972R with NI5783 transceiver and I have been trying to program it for analog input and get an error about the data clock when I try compiling. I have tried the whole day several options but failed. I have attached the errors I get as below. Could someone please let me know how I can overcome this.
Any suggestion will be highly appreciated.
FLex RIO 7972+NI 5783
采集部分只能在单周期定时循环中运行，也就是SCTL中运行，而且时钟域也只能选择其特定的时钟，这个在说明书中有详细描述，我也正在使用Flex RIO 7975+NI 5783作采集数据和发送数据的应用，你可以先看看NI 5783的例子，有什么可以直接交流。
I think the IO node needs to reside in a single cycle timed loop, not a standard while loop.
Check the CLIP definition to see which clock domain the node needs to be in and then do that.
Do you have experience with SCTLs? (Single Cycle Timed Loop = SCTL)
我之前做过一些关于FPGA VI 的编程，也实现了一些反馈控制，现在正在做SCTL的一些编程，有些东西必须在SCTL中实现，绕不过去，我的硬件是FLex RIO 7975+NI 5783 做一个外触发采集数据的工作，我觉得可以深入交流交流，你的邮箱？ your E-mail?