Problem solved

[MogaRaghu]

Some time back I had posted a VI called Simple StateMachine template. Based on the comments from fellow members I have redone it and am attaching it herewith. ( LV7.1 + Win_XP Professional )

If you just open it and check the block diagram, you will notice that LV has introduced a feedback node in the error cluster looping between DAQMx function Write Digital Output and Read Analog input. I am not sure why LV does this even though the two functions have no common reference or relevance between them.

You can also try this : Just remove the data lines to the two Digital Out functions, and also the error cluster with Feedback node . Rewire the Error cluster but this time without the feedback node. And now if you try to connect the Digital Out data lines, you will find that the Data lines are drawn with feed back nodes !!

I am sure LV is trying to tell me something - only that I don't understand what it is. Can some one  elaborate on this ?

Thanks

Raghunathan

Message Edited by Raghunathan on 07-04-2005 08:29 PM

[altenbach]

You have an impossible loop in your code (Run it with execution highlighting to verify):

Dig8-15 relies on data from the case structure.

analog input 0-7 provides data into the big case structure

This means that Dig8-15 cannot execute until the case has executed, but the case must wait for data from analog out. LabVIEW is smart enough to insert a feeback node such that AI0-7 gets the error from the previous interation. This is NOT a desirable situration. 

Without the feedback node, yuor code is broken. AI0-7 cannnot run because it must wait for DO8-15 to execute. DO8-15 cannot execute because it must wait for AI0-7.

You should:

1. Uncheck the diagram option "Auto insert feedback nodes in cycles" to make sure to get broken wires so it is easier to find the problem.
2. FIx your dataflow. Please make sure your wires flow left-to-right, it make errors like this less likely. You need to wire the error clusters in the order the subVIS execute.

I hope this is clear enough, but please ask is you continue to have problems. Good luck! 🙂

Message Edited by altenbach on 07-04-2005 07:18 PM

[MogaRaghu]

>>.... AI0-7 cannnot run because it must wait for DO8-15 to execute. DO8-15 cannot execute because it must wait for AI0-7.

But  why ? I am unable to figure out why  AI0-7 has to wait for DO8-15 and vice versa.  Even inside the case structure there is no link between both of them. There is no relationship between the data handled by both the functions. OK the common thing between both is the error cluster looping - is that the reason ?

I did try out the option of removing the "Auto Insert Feedback Nodes" and ended up plenty of wires with error " WIre is member of cycle " when I removed the feedback node manually.

I am sorry - but somehow I cannot figure out the real issue - though I am kind off vaguely starting to see the problem . Would reorganizing the error looping help ?

Thanks 

Raghunathan

Message Edited by Raghunathan on 07-05-2005 05:49 AM

Message Edited by Raghunathan on 07-05-2005 05:49 AM

[altenbach]

---

@Raghunathan wrote:
But  why ? I am unable to figure out why  AI0-7 has to wait for DO8-15 and vice versa. 

---

In dataflow, every node is scheduled to execute only once all wired inputs contain data.

In your timed loop structure, the case structure can only execute after all "XXX inputs" have executed, thus all these must run first.

Now the case structure can run.

After it finishes, the "XXX out" wires contain data and all the output nodes can now run. They all rely on inputs from the case structure, thus must wait.

BUT!  your error cluster is wired such that it would force a different execution order as imposed by the case structure.

To fix:

1. The error cluster must first go through all "XXX input" nodes.
2. Then the error cluster should go through the case structure.
3. Only now, the "XXX outputs" can receive the error cluster.

All clear? 🙂

[altenbach]

You VI is entirely incomplete and I don't have DAQmx installed so I cannot test it, but here's a quick example fix to route the error cluster in accordance with the dataflow of the rest of the code. It is still pretty ugly (I don't understand the logic of the case structure, possibly because virtually none of the outputs receive any real data. I assume it is still "under construction") . 😉

Please make sure that outputs from the case structure are on the right (and inputs on the left), else things like this happen all the time. 😉

[MogaRaghu]

Dear Altenbach,

>> All clear?

Absolutely.

When the master explains , the student has no further doubts.

Thank you so much.

Regards

Raghunathan

[MogaRaghu]

Dear Altenbach,

After your first post giving the guidelines for routing the error cluster ,  there was no further difficulty. And one look at the modified VI  confirmed my understanding. Great.

And your assumption that the code is still under developement is very correct. Reason why there are incomplete case structures.

Thanks for spending your time on correcting the mess.

Regards

raghunathan