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Feedback-node in FPGA

Buenos días, 

 

estaba realizando un .vi en Labview dentro de la FPGA. Este .vi requeria la utilización de realimentaciones, y mediante la realización de varias pruebas, comprobe que el feedback node en la FPGA tiene "problemas".

 

Cambie las diferentes opciones que se da en el cuadro de dialogo e hice una prueba con cada una de las opciones, llegando a la siguiente conclusion:

 

Si el programa requiere un parametro de inicializacion del feedback, se debe elegir compile or load en las propiedades del feedback node, por que si elijo el metodo first call, no funciona correctamente, pues el valor de salida del feedback mantiene continuamente el valor de inicialización.

 

Si no tenemos parametro de inicializacion, podemos escoger cualquiera de los metodos.

 

He llegado a esta conclusión, pero no se si realmente esto es así, y si es así, me gustaría que si alguien conoce el por que puediera ayudarme a entenderlo.

 

Les adjunto el programa ejemplo que me ha hecho llegar a esta conclusión. Se puede observar todas las posibilidades en el.

 

Un saludo. Gracias. 

 

 

Good Morning,
 
I was doing a .vi in ​​Labview inside the FPGA. This .vi required the use of feedback, and by performing several tests, check that the feedback node in the FPGA has "problems".
 
Change the different options that are given in the dialog box and I did a test with each one of the options, arriving at the following conclusion:
 
If the program requires a feedback initialization parameter, you must choose compile or load in the properties of the feedback node, because if I choose the first call method, it does not work correctly, since the output value of the feedback continuously maintains the initialization value .
 
If we do not have an initialization parameter, we can choose any of the methods.
 
I have come to this conclusion, but I do not know if this is really the case, and if so, I would like it if someone knows why he could help me understand it.
 
I enclose the example program that has led me to this conclusion. You can observe all the possibilities in it.
 
A greeting. Thank you.
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Hi cristina,

 

your example VI is "bogus": as there is no loop in the FPGA that VI will be executed within 25ns (at 40MHz clock rate) - and do NOTHING afterwards!

 

You might try to read/write FPGA VI controls/indicators from your host VI as long as you want, your FPGA VI does not run anymore…

 

Btw. what's the point of the feedback nodes between "next state" and "actual state"? Those two indicators should be named differently as "actual state" actually shows the "previous state", while "next state" shows the "current state"…

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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I do not understand very well what you say, I see that the .vi in ​​the FPGA if it runs despite not having a loop, the loop is in the host, some things do work, others do not, if it was as you say no Should not everything work?

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Hi cristina,

 

I see that the .vi in ​​the FPGA if it runs despite not having a loop, the loop is in the host, some things do work, others do not,

The host VI runs on a different CPU than the FPGA VI. Even when the host VI is spinning in its own loop the FPGA VI is completely independent! When there is no loop in the FPGA VI then it will only run for a very short amount of time!

THINK DATAFLOW is all you need to obey…

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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Agree, I thought that if I called the fpga variables in a host loop using the functions of the fpga interface palette, it would be enough, since I have run some programs like this and they have answered perfectly.

 

 

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@cristina.lopez wrote:

I do not understand very well what you say, I see that the .vi in ​​the FPGA if it runs despite not having a loop, the loop is in the host, some things do work, others do not, if it was as you say no Should not everything work?


Everything should NOT work.  Your FPGA needs to be constantly running.  That is the point of the FPGA: customized hardware timed control.  From what I am seeing, you would be better off using the NI Scan Engine and do all of your programming in the RT.

 

Might I recommend some reading material: NI LabVIEW for CompactRIO Developer's Guide


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