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False 100ms pulse NI9401?

Hi everyone,

 

I am facing a very serious problem in my LabVIEW FPGA project, I am using the NI9401 DIO module and in a simple program in FPGA I provide all 8 channels FALSE in a loop, but when I access this FPGA VI from RT VI, when I exit the RT VI I have a unnecessary 100ms pulse on all 8 channels. I am attaching both VI,s images. PLEASE HELP IN THIS REGARDS!

 

This pulse actually makes a dangerous short circuit in my DC Converter.

 

 

With Best Regards,

azy

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Hi embedded,

 

why do you stop the FPGA VI at all?

Why not let it run and still output that "zero" to your DO pins?

 

You know the FPGA runs (or can run) independently for the RT system?

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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Hi GerdW,

 

Thanks for the reply, now here is the problem here i am attaching my application FPGA VI, where i have to give inputs to FPGA in form of PWM parameters from HOST VI and also get sensors data from FPGA at the same time. and you notice i do work in FPGA in steps and when you next time start the application i have to reset the FPGA to follow the project sequence, if i hang the FPGA how can i get back without resetting FPGA???

 

I am attaching project RT and FPGA VI's.

Mod2 is NI9201

Mod3 is NI9215

 

 

Best Regards,

azy

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I agree with GerdW: don't stop the while loops in the FPGA. Put a case inside the loop that allows it to operate or not. For example:

 

Untitled.png

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Hi embedded,

 

thanks for describing this undesired behaviour of glitches from the NI 9401.

There shouldn't be any impulses at all after the VI is stopped. This occurence is already reported and known by the NI R&D department.

 

Please use a workaround as Todd in previous post mentioned.

 

Kind regards,

 

rupido

NIG AE

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