08-22-2019 09:01 AM - edited 08-22-2019 09:52 AM
I am new to LabVIEW. I tried to add a very simple VHDL code into a PXIe-5764 (chassis PXIe-1062Q, PXIe-8840). I tried to follow the tutorial present in the online help (CLIP Tutorial: Adding Component-Level IP to...). Then I want to run my project, but the compilation by Vivado fails with
ERROR: [Synth 8-5809] Error generated from encrypted envelope. [C:/NIFPGA/jobs/Tf9tGWE_wwJ8U9O/DemoClipMult.vhd:46]
Attached is the complete Xilinx log.
Thank you
PS Labview 2019 (64-bit) 19.0
08-23-2019 02:54 AM - edited 08-23-2019 03:16 AM
My problem might not be related to CLIP. I have another simple VI without VHDL code that does not compile any more on the local machine. I get the same result with LabVIEW FPGA Compile Cloud Service.
Let me put things together:
I am new to LabVIEW, and LabVIEW FPGA (but I have some expertise in FPGA and Vivado)
Following tutorials, I created a simple VI that I could compile using the Cloud Service.
Then I installed Vivado using the NI Package Manager, and I could compile locally, which was much faster.
Following tutorials, I created a CLIP.
But now I am not able to compile any more. Neither the simple VI, nor the CLIP.
Thank you
08-27-2019 07:57 PM
To confirm that your config is correct, can you compile and run the Getting Started example for the 5764?
What version of Windows are you using?
Can you use the IP Integration node? (so you can simulate it) Has the VHDL been verified outside of LabVIEW FPGA?
09-02-2019 05:08 AM
It seems I can not run the Getting Started example any more. It worked once. See attached.
Windows version is 7 Professional, SP 1.
"Factory Image 2.0.1f0". I have also accepted some Windows updates.
Thank you
09-03-2019 07:46 AM
I am in the same exact boat as you with this error. I looked on some other sites and they suggested upgrading Xilinx?
Also, the directory (the part after the jobs/....) where the error occurs doesn't exist for me. Is this the same for you?
09-03-2019 09:09 AM - edited 09-03-2019 09:27 AM
Hi bchang32,
I have installed Vivado using the NI Package Manager, so I presume it is the right way... I did not try to update it.
I presume the jobs/ directory contains temporary files used during compilation, so I am not surprised they do not exist any more.
PS: I just discovered I can update LabVIEW, and LabVIEW runtime to 2019 f2
09-03-2019 11:17 AM
PPS: I just updated to 19.0f2, but it does not help.
09-05-2019 04:27 AM
@tcachat wrote:
It seems I can not run the Getting Started example any more. It worked once. See attached.
Windows version is 7 Professional, SP 1.
"Factory Image 2.0.1f0". I have also accepted some Windows updates.
Thank you
Your issue is configuration. I would first focus on getting the Getting Started example for the 5764 to run (as it comes from LabVIEW). Maybe uninstall and reinstall? Or repair installations?
09-06-2019 06:36 AM
Using NI Package Manager, I have "repaired" Vivado. It does not help. Then I have "repaired" all components (takes a few hours), reboot the system, but today the system refuses to start up. It seems like there is a power issue: complete shut down about 3 seconds after power up.
01-10-2020 10:04 AM - edited 01-10-2020 10:56 AM
In the meantime we had to replace the PXIe-8840 Controller. For some unknown reason it was broken. Then I could start again and compile several time the project under development. But today I face again the synthesis issue: "Error generated from encrypted envelope". More precisely, here is the log:
<<
LabVIEW FPGA: The compilation failed due to a Xilinx error.
Details:
ERROR: [Synth 8-5809] Error generated from encrypted envelope. [/opt/apps/NIFPGA/jobs2/Tn4kQpj_Fhz0mjh/threshold.vhd:92]
ERROR: [Synth 8-5809] Error generated from encrypted envelope. [/opt/apps/NIFPGA/jobs2/Tn4kQpj_Fhz0mjh/threshold.vhd:94]
ERROR: [Synth 8-5809] Error generated from encrypted envelope. [/opt/apps/NIFPGA/jobs2/Tn4kQpj_Fhz0mjh/threshold.vhd:96]
ERROR: [Synth 8-5809] Error generated from encrypted envelope. [/opt/apps/NIFPGA/jobs2/Tn4kQpj_Fhz0mjh/threshold.vhd:99]
>>
One strange thing is that threshold.vhd is one of my source file (CLIP), but it is limited to 80 lines. I presume the full path is related to the cloud computing I am using. This time I still can compile the Getting Started example for the 5764.
I would really like to know what this error means.
Edit: Using a local compilation, I could track the file C:/NIFPGA/jobs/***/threshold.vhd, which is longer, but encrypted! No way to understand.