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FPGA - is interactive communication slot dependent?

Hi,


I encountered an interesting situation I would like to ask about.


I am developing a project using 2 FPGA cards. They are controlled by programmatic FPGA interface communication. I often activate interactive front panel communication to better understand what’s going on.


I had to move my FPGA Cards in my PXI chassis from slots 17 and 18 to 2 and 3. This resulted in interactive front panel communication no longer being available while FPGA is running. Trying to start the application when FPGA Vis are on generates error -61203: “The operation could not be performed because the FPGA is busy operating in Interactive mode. Stop all activities on the FPGA before requesting this operation”. Returning to status quo eliminated the problem.


I would be grateful if anyone could help me understand how FPGA slot placement and interactive communication are connected together.

 

Hardware:
2x NI PXI-7853R FPGA cards
NI PXIe-1065 (18 slots)

 

Best regards,

Piotr

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Hi Piotr,

 

I see your post being untouched for quite a while.

Did you manage to find the answer for your posted questions?

If no, is the PXI controller you're using running Windows or is it Real-Time OS based?
Did you recompile your FPGA VI after changing the slots?
After recompiling, can you try to Re-create control to FPGA read/write node you're using and let us know the result?

 

Thanks.
Regards,

Patrik
CTA, CLA
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Hi Patrik,

Thanks for the reply. Unfortunately, problem stays unresolved.

I am running Pharlap RTOS.

I did recompile the VIs numerous times, recreated read/write nodes, tried substituting FPGA VIs with another ones. Problem persisted.

It is not key for me to have FPGAs working in new slots right now, so I switched them to original position. I would just like to know why the problem had surfaced.

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In your project, your device is associated with a given slot. LV uses this to know which device you want to run your code on.

 

If you look in the system browser or MAX, you'll see there's a resource associated with the FPGA target in your device. Mine is "RIO0". If you mave multiple cards, the second will presumably be "RIO1".

MAX definition of "RIO0"MAX definition of "RIO0"

 

Then, make sure the same ID is entered for your device in the project.  Right-click your target, go to properties and make sure the ID matches the actual card you want it to run on.

 

Here's my "RIO0"Here's my "RIO0"

Maybe that will help.

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