09-28-2010 02:06 PM - edited 09-28-2010 02:08 PM
I am trying to use the new "FPGA Interface 2010" feature of dynamic FPGA references to use the same code for different targets. However, I am getting a broken FPGA reference wire that doesn't make sense to me:
The "clock 1 settings" the error hint is referring to is a simple strict-type-def cluster on the FPGA VI front panel. I was previously having the same problem with a strict-type-def array. When I replaced that array by a cluster (NOT the "clock 1 settings cluster, though!), the problem just jumped to another front panel element (i.e., the "clock 1 settings").
What does "Register is different" mean?
When I open the FPGA VI reference I use exactly the same bit file as when I configure the FPGA reference in the class' private data (to which I try to write to above when getting the broken wire):
Am I doing something wrong or did I hit a bug the new FPGA module?
09-28-2010 02:42 PM
Could it have to do with the strict type defs?
09-29-2010 06:43 AM
Hi dlanger,
it is very likely due to the typedefs as dynamic references don't completely support them yet.
Does it work without them? If not, then there might be another reason.
Regards,
10-05-2010 06:08 AM
Would there be in the near future support for it through a patch?
10-05-2010 06:11 AM
I believe this will be possible in a future version, but probably not as a patch to the current version.
regards,