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FPGA basic concept question

Hello all,

 

I have a NI FPGA card (PXI-7833R). I have run through the getting start tutorial, and understand that I have to create the FPGA code in LabView. After creating the code, I can compile that code and deploy the mapping onto the FPGA by clicking the Run button in LabView. Then, I can use a host vi to open and control the FPGA reference.

 

I have created, compiled, and deployed a FPGA code (MyFPGA_ProgA.vi). I also have make the host vi (MyHost_A.vi) that opens the MyFPGA_ProgA.vi reference. After that, I decided to make, compile, and deploy another FPGA code (MyFPGA_ProgB.vi) along with another host vi (MyHost_B.vi). Now, if I run MyHost_A.vi with the reference still pointing to MyFPGA_ProgA.vi what happens? Does my MyFPGA_ProgA.vi gets deployed back onto the FPGA, or am I running MyFPGA_ProgB?

 

What is the difference between using the vi and the bitfile in "Configure Open FPGA VI Reference"?

 

Thanks.

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Message 1 of 4
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Only one application can run on the FPGA at a time, so if you have host VI A running and connected to the FPGA, you should get an error if you try to then run host VI B. The host VI B should never be able to connect to an FPGA running FPGA VI A unless the VIs are actually the same exact application.

 

If the Open node is connected (aka linked) to a VI, it will propagate changes about the VI as they occur. For instance, if you were to delete a control from your FPGA VI and save it, the host VI would immediately recognize that change and update itself. This mode also allows you to start editing the host VI before you have built the actual bitfile which can be useful for the larger devices. At run-time, VI mode and bitfile mode are the same thing. 

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Just to expand on the first question. I am not running the two host VI at the same time. I have compiled and run A, and after that I have compiled and run B. After that, do I need to recompile MyFPGA_ProgA before I can run MyHost_A again? Thanks.

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No, you should be able to run MyHost_A again without recompiling MyFPGA_A.

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