FPGA VI Compilation Failure

[lawrencium92]

I have issues with trying to compile an FPGA VI. It was able to compile previously until I made a few changes. I added in another memory block and created two extra sub VI which are used to read and write from the said memory block. I also had to rewire a node as it was incorrectly wired before. After making these changes it produces two errors as shown in the attached xilinx log file. I should also mention that I have no trouble comiling other FPGA VIs, its only this particular example in which the process fails.

Any advice on fixing this problem is greatly appreciated, thanks!

[crossrulz]

We need to see code.  It is likely some really small detail that you missed.

[christian_w]

Two errors are saved and both are indicating a range problem. Look at your memory which is configured with 9 or 10 elements.

Could be an initialization problem. You could init your memory from the project properties. Check if you try to access an element outside of the specified dimension/range.

ERROR:HDLCompiler:1318 - "C:\NIFPGA\jobs\OQ01h29_W30F9T1\NiFpgaAG_0000001a_CustomNode.vhd" Line 101: Left bound value <10> of slice is out of range [9:0] of array <ctoresport>
Netlist NiFpgaAG_0000001a_CustomNode(17,10,32,512,16,2,33,-61220,0)(rtl) remains a blackbox, due to errors in its contents

Elaborating entity <FPGAwMemoryn6> (architecture <rtl>) with generics from library <work>.
ERROR:HDLCompiler:410 - "C:\NIFPGA\jobs\OQ01h29_W30F9T1\FPGAwMemoryn6.vhd" Line 100: Expression has 8 elements ; expected 9
Netlist FPGAwMemoryn6(27,1,10,17,512,16,0,0)(rtl) remains a blackbox, due to errors in its contents

Hope it helps

Christian