FPGA Reference Questions

[TeagueHall]

Hello,

I have a couple questions regarding FPGA references used within realtime host applications.

1) NI documentation states that you can open up a reference to either a FPGA VI, Build-spec, or Bitfile. This confuses me. I assume that every FPGA VI must be compiled into a bitfile before it can be loaded into the FPGA. Thus, it would make sense that you would open a reference to an FPGA bitfile. But what exactly does it mean to open a reference to an FPGA VI or Build-Spec? If you open a reference to a FPGA VI or build spec, does that mean that the FPGA VI is compiled at runtime? So in that case, what's the difference between opening a reference to an FPGA VI vs build spec?

2) What exactly does the 'Dynamic FPGA Interface Cast Function' block do? Why would you cast an FPGA reference into a different type? What purpose would that serve? Not that I would, but could I really cast an FPGA reference to a toggle button reference?

[crossrulz]

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@TeagueHall wrote:

2) What exactly does the 'Dynamic FPGA Interface Cast Function' block do? Why would you cast an FPGA reference into a different type? What purpose would that serve? Not that I would, but could I really cast an FPGA reference to a toggle button reference?

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Reuse.  You can actually cast your FPGA reference to another FPGA reference with fewer "interfaces" (front panel IO, DMA FIFOs).  Therefore, you can make more generic code with the specific interfaces you need to run on the RT.

[dan_u]

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@TeagueHall wrote:

1) NI documentation states that you can open up a reference to either a FPGA VI, Build-spec, or Bitfile. This confuses me. I assume that every FPGA VI must be compiled into a bitfile before it can be loaded into the FPGA. Thus, it would make sense that you would open a reference to an FPGA bitfile. But what exactly does it mean to open a reference to an FPGA VI or Build-Spec? If you open a reference to a FPGA VI or build spec, does that mean that the FPGA VI is compiled at runtime? So in that case, what's the difference between opening a reference to an FPGA VI vs build spec? 

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When you open a reference to an FPGA VI it will, when you try to run your code, check if the bitfile matches the current VI state. So if you modified the FPGA VI since you last created the bitfile it will not let you run the code, LV will tell you the FPGA VI needs to be compiled first.

When you open a reference to a bitfile there's no such check. You have to make sure the bitfile is up to date.

I never used the build spec option, I would assume it is similar to the VI option.

So in the end all options require a bitfile, it's just a different way to select it and LV does more or less checks.

[Hooovahh]

Yes another benefit of referencing a VI instead of the compiled bit file, is the front panel of the running VI will be connected to the compiled code on the FPGA.  In the past this allowed me to run my host code in source, but then open the front panel to my FPGA and see it running.  From here I can interact with the FPGA front panel to have it invoke parts of the FPGA code manually, or to see indicators of various debug information.  Of course when compiled into an EXE this doesn't really work, so I usually change to reference the bitfile in the EXE.

[nathand]

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@TeagueHall wrote:

1) NI documentation states that you can open up a reference to either a FPGA VI, Build-spec, or Bitfile. This confuses me. I assume that every FPGA VI must be compiled into a bitfile before it can be loaded into the FPGA. Thus, it would make sense that you would open a reference to an FPGA bitfile. But what exactly does it mean to open a reference to an FPGA VI or Build-Spec? If you open a reference to a FPGA VI or build spec, does that mean that the FPGA VI is compiled at runtime? So in that case, what's the difference between opening a reference to an FPGA VI vs build spec?

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When you open a reference to an FPGA VI, you gain the ability to run that FPGA VI in interactive mode while the host code is running. This is very helpful for debugging, because you can see the front panel of your FPGA running, and even modify values on it. Additionally, if you're running on a desktop target and you set your FPGA to run in simulation, everything works properly - the FPGA executes in simulation in parallel with the host and you can debug both of them together. You cannot do this when you open a reference to a bitfile or a build specification.

I've never needed to open a reference to a build specification, but it could be useful if you have multiple build specifications for the same VI (for example with different optimizations) that you want to compare. If you have multiple similar FPGA VIs, referencing a build specification lets you switch between them without modifying your code (instead, change the build specification to reference a different top-level VI), although I'm not sure when it would be helpful to do that.

[Intaris]

For me personally, I find the "VI" Option useful when the FPGA target is set to SImulated I/O mode.  This way, no bitfile is required or created.

That was I can go in make a few quick changes and re-start whatever interfacing code I'm using.  Execution of FPGA code in simulated mode is very very slow but for testing, sometimes it's still a real time saver.

[dr2]

Referencing the Build Spec is useful if you want to run the same VI on different Hardware Targets.

[MyrzaMBM]

Hello
I'm working on a project based on the example getting started 5783.

My problem is that when I compile by referring to the bitfile, the project works perfectly, but when I refer to the VI without changing anything, I have an error in the stream on the AO loop.

I tried to do some modifications in the FPGA VI and compile to have a new bitfile, the project don't work by refering the new bitfile.

It only works by referring the bitfile by default ! 

what can be the problem ! 

thanks

[JensG69]

Hi MyrzaMBM,

instead of attaching your questions to all old threads concerning FPGA references it might be better to create a new deticated thread just for your problem.

Regards, Jens

[MyrzaMBM]

Ok, Thank you !