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FPGA: NI 9144 to NI PXIe 8135 causes error after file generation is complete


I have a simple FPGA program that compiles in cRIO without any problems, but I want to use the FPGA program on the NI 9144 EtherCAT Expansion Chassis in FPGA mode to NI PXIe 8135 (Code file attached). As you know there are some differences between programming the local FPGA and the FPGA for EtherCAT RIO, that must be used user-defined I/O variables (this paper).

For Compiling I did step by step as this paper said, we get successful processes, but after file generation complete we have an error (that attached). It shows that the file can not run in chassis. 

Please help me.



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