FPGA Module using DMA in an SCTL

[Troy]

Does anyone know if you can perform DMA transfers in a SCTL?  I have tried coding this, but I get generation error "Error Code: 61056: Component Interface has invalid arbitration for Single-Cycle Timed Loops".  I have tried all three settings for the arbitration (Always, Only if multiple callers, and Never), and I still get the same error.  I am trying to use the SCTL to keep code space usage small. 

[Bassett_Hound]

Troy,

DMA transfers are supported in SCTL.  More than likely your code has tried to use the FIFO both in a SCTL and outside a SCTL which is not supported. 

All primitives in the FPGA Hardware Palette (which is the default palette when targeted to FPGA hardware) can be used in the Single Cycle Loop except for the following:

For Loop
FPGA Math & Analysis VIs except the Linear Interpolation
Look-Up Table 1D, and Saturation Arithmetic VIs
FPGA I/O Method Node except with some FPGA targets. See note below
FPGA I/O Property Node except with some FPGA targets
Interrupt VI
Loop Timer VI
Quotient & Remainder function
Rotate 1D Array function
Timed Loop
Wait VI
Wait on Occurrence function
While Loop
Multiple FPGA I/O Nodes configured for the same I/O resource if at least one node is inside the loop and at least one node is outside the loop
Non-reentrant subVIs if you use multiple instances  

Hope that helps,

Steven B.

[Dustin_W]

Also make sure that your timeout for writing to the FIFO is set to 0.  Because the code MUST execute in a single cycle, it cannot wait.

Dustin

[jdigiova]

You can have the arbitration option set to 'Arbitrate if multiple accesors only or Never'.  You must also have only 1 instance of the DMA FIFO on the block diagram.  Perhaps you have multiple instances in different cases of a case structure which is not allowed.  You would need to pull the separate instances out of the case structure and have only 1 instance on the block diagram.

Regards,

Joseph D.

[Troy]

Thanks for all the help.  My problem ended up being the multiple instances in the block diagram.  I have fixed that and it now compiles.  Thanks again.