FPGA Loop delay not working

[LullabyIsland]

Hi ,

I am new to FPGA programming and I am trying to learn to control the speed of the motor through FPGA. Our colleagues gave me a (plain) sample code but there seems to some problem with the loop delay. It is like, there is no effect of the loop tick count at all. 

I am attaching the snapshop. I don't know what's going on here. 

For the 2000000 ticks, I expect to get 5ms delay. 

[wiebe@CARYA]

It should be (will be) 50 ms (at 40 MHz) for 2000000 ticks. Your code uses 200000 ticks, giving 200000X25ns (or 200000/40M) = 5 ms.

Why don't you click the wait function, and change the unit from ticks to ms?

[LullabyIsland]

Hi wiebe,

I did try to change it to ms. But it was not working. I was trying to control the loop delay with my main vi using the control. No matter what values I tried the loop executing time was always the same. So i tried hardcoded value- no change in the total executing time.

Regards.

S

[wiebe@CARYA]

add a 0 to 200000, so it becomes 2000000... Try that first, then we'll go from there.

[LullabyIsland]

wiebe,

whether the value is 200000 or 20000000 or 4000000, the loop execution time is always the same. I mean there is no effect of the loop delay at all. I am not getting any warning or anyhing while compiling.

[wiebe@CARYA]

Could you replace the metronome to a normal wait?

[LullabyIsland]

I only have this for FPGA. I tried with other delay - no change in the behaviour.

[dkfire]

How do you measure the loop timing?

[wiebe@CARYA]

I'd use the normal wait, although the wait for multiple should work.

Good question: how do you measure?

Running the FPGA VI from a main VI on the host introduces room for error. Maybe the host VI links to an old bitfile or an old VI? In stead of running from a main VI, try running the VI directly on the FPGA. Then manually set the values from the FPGA VI while it's running. 

Put "i" on the from panel so you can watch it (either from the panel or from the host). That would be the clearest indication of the loop speed.

[LullabyIsland]

Hi dkfire,

The top level vi is something like this. I have an array of samples that need to be output for 65 seconds . The FPGA FGV gets sample rate input and calculate the ticks and that would be my loop delay in FPGA. So, when I finish executing the loop, I expect a value around 65000 in the looptime indicator. Now, all I get is around 27114 all the time , no matter what tick value I set.