FPGA DMA not found in bitfile

[cirrusio]

Hello all,

I have run into an odd and frustrating problem.  I have a project fairly along in the development process that contains an FPGA target on the cRIO 9081.  I have been transferring large amounts of data via a target to host DMA FIFO.  I changed the number of elements in the FIFO from 512 to > 8k and all of a sudden the FIFO can no longer be found when the FPGA reference is configured with the synthesized bitfile.  The FIFO is visible when I configure with the VI option, but when I run the VI on the host and try to start the buffer, I get the error -61071 with the explanation "LabVIEW FPGA:  The selected DMA FIFO was not found or is out of sync with the bitfile."  I have tried changing the size of the buffer, renaming it and recompiling it, but I get the same result (which is incredibly frustrating given that the compilation process takes about 30 min each time).  I am about to the point where I am going to have to try to rebuild the project, but this seems like a terrible solution given that I will have to rebuild a lot of the options on the target.  Has anyone ever seen anything like this?  Am I missing something?    Anyone have any thoughts?

Cheers, Matt

[cirrusio]

OK, so it appears that when I placed the FIFO in a case structure (this would be the only place it was written to), I no longer had access to the FIFO on the host side. Below are the two versions of the VI the first doesn't work and the second does (for whatever reasons, I can't seem to actually insert the images into the body? - I get authentication failed message or something like that).  Does any one know why I might be having this issue?

And unfortunately, I am now getting an odd error on the host side with the same FIFO that was working before it wasn't: -61073, with the explanation "LabVIEW FPGA:  The number of elements to read or write must be less than or equal to the depth of the host memory DMA FIFO."  Ugh.  Not sure what this means.  The FIFO size is 1023 (default) and I am trying to read 200k samples currently on the host size.  Any thoughts?

Thanks, Matt

[T-REX$ · Accepted solution]

My best guess is that '999' is always bigger than '500' (constants), so the false case of your case structure can never be reached, therefore the compiler is optimizing it out. If you switch one of those constants to a control, you can test my theory.

[cirrusio]

Doh!  that is incorrectly wired...Thanks a lot - I don't think we need to change this to a control to verify that the 999>500; I believe my 1st grader could tell me that.  Thanks a lot!

[T-REX$]

Haha, I just meant we could verify the compiler was in-fact optimizing it out. It won't be able to do so if one or both is a control.

[cirrusio]

Sigh...some days are just like this.  With all of the rejiggering trying to figure out my own dumb problem I managed to incorrectly configure the FIFO.  Second problem solved!  Thanks again trex...

Matt

[amezam]

Hello mtat76,

Thanks for posting at NI Forums! I definitely understand your frustration with this error. This is a known issue for LabVIEW 2010, and it was filed under CAR# 233957. It seems like you already tried renaming the FIFOs and recompiling, and it didn’t work. Instead of rebuilding the whole project, let’s try first copying and pasting the contents of the block diagram into a new VI and recompile it. I saw cases in which this worked for different customers. If that doesn’t work, then I suggest rebuilding the project.

[cirrusio]

Thanks, amezam.  But trex has actually pointed the way to the problem.  All is well now and there is no issue for NI to resolve.  Thanks, Matt