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FIR compiler for begginers

Hi all!

i'm new to FPGA , and i have a VI (i did not program it) that uses the FIR Vi to fliter an array of waveforms. i'm trying to re-write that VI in FPGA
instead of an array of 9 diffrent waveforms i have 9 diffrent 1D arrays (Each elamnt in the arrays is FXP (24,7)) 
i tried to save the filter data from the original VI to a txt file, then to make it into a .coe file, and to use this file with the 7.1 FIR compiler 
all i get after i do all the neccery conversions (from FXP to array of BOL for each point of data) is a False array, like nothing have happend
some expermints have thought me that issue may lay with the ACLK input of the FIR compiler VI, but i have no clew what am i doing wrong?

Any help (or hint's. or relvent data sheets/manuals/white papers) would be helpful


thanks in advance 🙂


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Message 1 of 9

I was able to find some potentially relevant resources on FIR that might be helpful as you debug:


Working with LabVIEW Filtering VIs and the LabVIEW Digital Filter Design Toolkit VIs


FIR Filter VI


Teaching FIR Filter Design Using the Digital Filter Design Toolkit (Windowing)


Getting Started with the NI LabVIEW Digital Filter Design Toolkit


Good luck!

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Message 2 of 9

An example VI with the FIR Compiler 7.x block in a SCTL, wired to IQ data would be sublime.


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Message 3 of 9



I found such an example. It is in the High Throughput FPGA course though, exercise 5-1.


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Message 4 of 9

How you do it anyways? I can't understand where you aclk signal should be connected to

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Message 5 of 9



Are you talking about the Xilinx IP in LabVIEW, FIR Compiler 7.x block?


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Message 6 of 9

Yes, the Fir compiler 7.2 to be exact!!!

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Message 7 of 9

I do not think the aclk signal needs to be connected.

Certified LabVIEW Architect, Certified Professional Instructor
ALE Consultants

Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
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Message 8 of 9


it's been a while, but can someone post the exercise 5.1?

Thank you.

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