I get the following error message when I try to run an FPGA VI on target manually (from within the project environment). Also, the values in the FP contain spurious values before stopping, which makes me wonder if the PC Host and the Target are out of sync somehow.
I tried the same thing using my laptop (also built the bitfile on my laptop), and then it works like it usually does. From other posts is seems the error is related to using different clock rates for timed loops, but the only type of loops I have are since cycle loops. Trying again on the desktop it doensn't work.
(Using LabVIEW 8.5.1, cRIO-9012 / 9104 3M chassis)
So you are building the bitfile from another project on your laptop and you are trying to run it from a project on a desktop? What clocks are you using for your single cycle Timed Loop in each case? I would check to see what happens if you try to compile your fpga vi on your desktop? Does it throw a timing violation during compilation?
It seems the error message had nothing to do with what was the cause. I tried to checkout the source code to a different folder and now it is able to connect again. Must be some inconsistency somewhere. There were only cosmetic changes since the last version and no changes to the loops or timing.
Hey Rob and Andrew or anyone else that has seen this,
I have the same error issue when using an external clock (strobe) on a 6583 FlexRIO FAM for a SCTL. The thing is, on one of my systems it works perfectly and on one of my customers systems it always throws the error. Same code, same CLIP, same setup but my customer cannot get past this error.
Rob, you mentioned "I tried to checkout the source code to a different folder and now it is able to connect again." - can you expand on that? I am looking to see if it could be the source of my customers problem.
Thanks so much, I know this post is old as dirt but I have not had much luck after trying everything I can think of.
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This sounds like a different issue than what is reported above. And given its age it may be good to start new thread.
Also, their hardware is different (cRIO) vs yours (PXI)