Error in acquired data from RC low pass filter channel.

[Amartansh13]

Hey all, 

I am generating the burst of sine wave of 5 volt and sending it over analog output channel of my USB 6356 board. This signal is transmitted to the input port of the RC low pass filter (R=15Kohm, C= 1nF ie Fcutoff= 10.6Khz). The output of this RC circuit is acquired on the analog input of same USB 6356 board. 

According to the theory, the amplitude of sine signal at cutoff frequency should be 3db less than the input signal (5x0.707 = 3.53V). I am getting a pretty close result but with a weird problem. In my received signal, the first cycle of sine wave is of 3.53V but rest of the cycles are of 2.9V. In fact, for all the different sine frequencies, the amplitude of first cycle is more than the rest of the cycle. The image attached will give you the exact understanding of the problem. Theoritically, first cycle should be smaller than other because of the coupling of the capacitor, but should not be bigger. 

I want to plot bode plot (frequency and phase response wrt frequency) by sending sweep signal through my output channel. But because of this problem, my bode plot is little bit shifted from the theoretical response (you can see the attached image). 

How can I prevent the amplitude of first cycle from reducing? 

Please help in identifying and solving this problem. 

[GerdW]

Hi Amartansh,

In my received signal, the first cycle of sine wave is of 3.53V but rest of the cycles are of 2.9V.

In your image the "rest of the cycle" is at ±3.4V peak.

In fact, for all the different sine frequencies, the amplitude of first cycle is more than the rest of the cycle.

When you use real hardware your capacitor needs to "initialize" when the first sine wave comes in. You see a similar effect with discharging after the last sine wave…

It's real hardware!

How can I prevent the amplitude of first cycle from reducing?

Why don't you cut away the first period of your sine signal before building the bode plot?

[Amartansh13]

Earlier, I also thought of removing the first cycle and estimate the results accurately. But as frequency increases, the more than one cycles are having more amplitude than the steady state cycles. You can see the image attached to understand it better. 

Theoritically, at 90kHz, the amplitude should be 0.58V but here it is 0.5V at steady state. Well, this much difference is okay for me but I want to remove this problem of having more amplitude in the start. in fact, in the start, the amplitude should be less because capacitor takes time to get charge. But opposite is happening here. Why?

Also, can you suggest me good method to estimate the phase vs frequency plot with these data. Right now, I am using correlation of this acquired data with the original waveform and estimate the lag. The phase difference is coming correctly in the start when the frequency is low. But as frequency is increasing, correlation is giving more wrong phase information. You can see the image attached. I guess due to this higher amplitude problem in the starting cycles, the correlation results are coming wrong for the higher frequency. 

[Alexander_Sobolev]

All your theoretical calculations are for infinite sine waves. If you have a limited sine wave (it starts, it ends), then it is sine wave, multiplied by a square function. Then you have a convolution of 2 functions and a transfer process in the beginning/end. 

If you want to compare results with infinite sine waves calculations, you need to compare signals after the transfer process have finished.

[AnalogKid2DigitalMan]

Also take into account the tolerances of your resistor and capacitor.

-AK2DM

[Amartansh13]

Hey thanks

But can you tell me how I can do this?

I mean what you mean by waiting for the transfer process?

How can I implement it?

[Alexander_Sobolev]

>> I mean what you mean by waiting for the transfer process?

Basically acquire enough data and cut off the beginning. 

Regarding phase difference at high frequencies.

That can be caused by wiring, not ideal components that add extra R, C, L into your simple RC schematic. Small, but they are important at high rates.

One more thing: what are sampling and generation frequencies at 90 kHz sine wave? 

[Alexander_Sobolev]

One more thing: try to measure phase and amlitude vs frequency without RC, just direct connection. Then you can say, what is coming from the board, what from the wires, what from the parts.

[Amartansh13]

Sampling rate is constant and equal to 500k S/s

[Alexander_Sobolev · Accepted solution]

500 kHz generation at 90 kHz. 5-6 points per cycle, 3 points per positive half-sine peak. Sometimes rectangle, sometimes triangle. You are generating a lot of high frequencies that affect your data and basic frequency has smaller amplitude. Increase generation to max rate.

Do you have sine generator, it makes single frequency? I would acquire from 2 channels (600 MS/s each) and correlate them.