Error 61046 -- NI 5761 Issue

[nkmath]

Hello,

I have a recurring error which is somewhat sporadic but has proven to be a pain to deal with. I'm using a NI5761 Digitizer with a PXIe-7965 FPGA for data acquistion. There is an external clock provided by the PXI-6682H timing module. Often the program runs fine but it seems that occasionally I get the error 61046 which states "Read/Write Control in NI 5761*.vi". I find that the error will occur after long breaks away from using the VI but it also occurs when the VI is being used repetitively. It begins when the code tries to open the FPGA resource which is the third block over in the attached code. The host VI should be attached.

I'm actually able to get it to start working again by recompiling the FPGA but that is annoying since it takes 20 - 30 minutes to do so. Any help is much appreciated.

[USBarnes]

nkmath,

I'm seeing some other forum threads related to this error and it suggests checking to make sure that the clock is securely connected within the supported specifications and also that the rate of the external clocks matches the specified clock rates for your application. You might give those things a check.

Also, I noticed there seem to be two identically named files you attached. Is there a difference between these two? They seem to be the same, but maybe I'm missing something.