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Error 50400 on FPGA to Host DMA FIFO

I Folk,
I am using a DMA FIFO to transfer data between the target (FPGA, PXI 7813R) and the host (Windows, PXI-8106, LabView 8.5.1) and when the FIFO is empty I receive the following error:

    Error - 50400 occurred at nirio_DMARead.vi:1
    Possible reason(s)
    The transfer did not complete within the timeout period or within the specified number of retries.

I have set:
    Number of Elements: 1
    Timeout (ms): 0

The Windows routine read recursively (every 100 ms) the FIFO to get the FPGA analysis results.
Because of different conditions, the FPGA routine write or not data on the DMA FIFO and can happen that the DMA FIFO is empty.
A longer timeout do not make sans because the FIFO can be empty for a very long while and, furthermore, no data in a loop time it is a result too.

How can I fix this problem?

Thanks,
Asper

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Message 1 of 4
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Hi Asper,

the timeout error -50400 you receive from FIFO Read method is expected, because of the parameters you set (timeout = 0) for the given function and the behaviour of the FPGA you described (FIFO write operation happening only in certain conditions).

What I suggest is to filter this error code -50400 by using a simple unbundle function for the error cluster wire and comparing the "code" value with -50400; then you can filter it with the Clear Errors.vi function or changing the error into a warning by negating the "status" element of the error cluster.

Hope this helps,

Fabio 

Fabio M.
NI
Principal Engineer
Message 2 of 4
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Hi Fabio,
the workaround you suggest is fine.

I have further worked and have found a different way.
First I use a Read-FPGA-Interface method to read the number of elements available in the FIFO, followed by a second Read-FPGA-Interface method to actually read the elements.
This approach works fine if the FIFO is empty too.

The first Read-FPGA-Interface method is set:
    Number of Elements: 0
    Timeout (ms): 0

The second Read-FPGA-Interface method is set:
    Number of Elements: connected to the "Elements Remaining" from the first Read-FPGA-Interface method
    Timeout (ms): 0

Many thanks,
Asper

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Message 3 of 4
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Hi Fabio and Asper,

 

I am using NI 7966R FPGA target. I am trying to read 10 channel data at a time and i am using 10 different fifos for it. While writing in FPGA FIFO i have used timeout 0. While reading i am using timeout 5000 ms. I am getting the same error code after some time. Its reading data in the beginning and then it is failing giving this error code. Can you suggest me a solution. The second solution by using two methods will help? Please suggest a good solution. I am a student who is pretty new to Labview FPGA and i ahve a big task to finish.

 

 

Thank you,

Mithun

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