Error -1073807252 during a VISA read.

[julesjay]

So after several hours of tests, It's still working wihtout error!!!! 

As a conclusion =>  NI-SERIAL RT 3.1  is bugged  (in my case!!))

[Anna_M]

Hi julesjay,

So you’re getting the error when you have either NI-Serial RT ver. 2.5.6 or 3.1, but not with ver. 3.0, correct?  And also just as clarification, if you use the DMA FIFO between FPGA and RT on the system with NI-Serial RT ver. 2.5.6 or 3.1 you do not get the VISA read error?  From what I have seen this has not been a documented bug at this point.  You also mentioned that the error occurs intermittently.  How frequently did it occur and did there seem to be any trend along these lines that you could see?  Thanks!

[julesjay]

#So you’re getting the error when you have either NI-Serial RT ver. 2.5.6 or 3.1, but not with ver. 3.0#   => ABSOLUTLY

#DMA FIFO between FPGA and RT on the system with NI-Serial RT ver. 2.5.6 or 3.1 you do not get the VISA read error#  => CORRECT TOO no error!! But I'm not sure that
DMA uses NI-Serial RT...

#How frequently did it occur#  =>   It's difficult to answer. Apparently It seems to depend of if DMA FIFO is enable or not. And in enable case, it depend of the speed I read /write them.  So DMA FIFO may also depend of Ni-serial as you suggested!!!!  I've tested with DMA disable and there were no error!

I Hope It will help you.

julesjay

[Anna_M]

Hi julesjay,

I've got a follow-up question for you - At what speed and buffer size settings do you notice the VISA error beginning to occur when doing DMA transfers?  Thanks!

[julesjay]

Hi Anna,

I don't understand what's exactly the question.

I don't realize DMA transfert with RS232.  I'm using RS232 to communicate with an emitter. MY DMA FIFO is from FPGA to host.

VISA parameters are 9600 baud and buffer size 256 ( if think; I don't remenber precisely). But I've also tried to change buffer size with no result.

[Anna_M]

Hi julesjay,

It looks like what we may be seeing here is that the DMA transfers from the FPGA to your RT target are taking priority of your controller's processor over the serial communication, resulting in a visa buffer overrun.  I would recommend taking a look at this knowledgebase article: http://digital.ni.com/public.nsf/websearch/D776A9D834B132AB86256ED2004E18EF?OpenDocument on setting the receive serial buffer size in the Measurement and Automation Explorer.  You can also take a look at this knowledgebase article: http://digital.ni.com/public.nsf/websearch/2D5F972CD550BBC386256F0B005E9A63?OpenDocument for more background information concerning this issue.  Hopefully this helps!

[julesjay]

Hi Anna,

I also think that the FIFO DMA  interrupts my VISA Read. But I've no idea how I can handle with this.

About the knowledgebase article: 

I cannot use Flow control because of the instrument I communicate with.

And I've tried the change VISA FIFO buffer in measurement an dautomation explorer but no change either....  😞

Since I'm back in ni-serial 3.0 I still have no error.

[Anna_M]

Hi julesjay,

Hmm, it would appear that we could be looking at a bug in NI-Serial here.  In order to file a corrective action request to submit to R&D regarding this matter, I will need to reproduce the problem on my end first.  I was wondering if you could tell me what version of LabVIEW FPGA and what LabVIEW FPGA module you are working with, and if there is anything else specific to your set-up that you think would help me to replicate your system.  Thanks!

[julesjay]

I'm working on labview FPGA 8.20 , Real time 8.2, RIO 2.1, Modulation toolkit 3.1, labview simulation 8.2, internet toolkit 6.0.

I use a DMA FIFO of 8192  U32 that I read every 500 ms. I sent a message over RS232 periodically and the answer is about 170 bytes.

Hardware PXI chassis 8196, pxi-7833R.

[julesjay]

I should also precise that i'm running windows 2000.