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Error 1055 occurred at Property Node when trying to compile FPGA VI

I get an error like the following lines when i try to compile a vi to be used on a sbrio:

 

Error 1055 occurred at Property Node in nirviObjectToResholderInfo.vi->nirviMakeLineInfoSubTagsForDiagramObjectRef.vi->nirviMakeTreeLineInfoTagForDiagramObjectRef.vi->nirviDiagramObjectError.vi->nirviSplitRegisterListBySize.vi->nirviPrintOneClkFramework_bushold.vi->nirviGetImplementation___busholdModGen.vi->nirviGetImplementation___busholdModGen.vi.ProxyCaller Possible reason(s): LabVIEW: Object reference is invalid.

 

I am using the vi to do timing comparisons between computer and FPGA. I do not know what is causing this error. Any help will be appreciated.

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homesru,

 

Are you passing references to a property node?  Try running the VI on the host and probing the data wire at the location of the error.  It would be helpful if you could post you code or an image of your code.

 

Which property node is causing this error?  Are you using subVIs?  If so, make sure all the inputs to your subVI are connected.

 

Thanks,

Drew T.
Camber Ridge, LLC.
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Hi.

I'm having the same error this evening after I modified a FIFO to pass a cluster of two FXP numbers instead of a single one.  The code works fine in simulation (targeted to a PC), but fails during compilation for a cRIO-9073 target.

 

The Failure message is:

 

An internal software error has occurred. Please contact
National Instruments technical support at ni.com/support with the following
information:

 

Error 1055 occurred at Property Node in
nirviObjectToResholderInfo.vi->nirviMakeLineInfoSubTagsForDiagramObjectRef.vi->nirviMakeTreeLineInfoTagForDiagramObjectRef.vi->nirviDiagramObjectError.vi->nirviSplitRegisterListBySize.vi->nirviPrintOneClkFramework_bushold.vi->nirviGetImplementation___busholdModGen.vi->nirviGetImplementation___busholdModGen.vi.ProxyCaller

 

Possible reason(s):

 

LabVIEW:  Object
reference is invalid.

 

I'm definitely not using any control references in my FPGA code, so I'm not sure what to debug aside from reverting my FIFO.  I understand that FIFOs are supposed to be able to handle clusters.

 

This is LV10 SP1, with RIO 3.6 and FPGA that was released with LV10 SP1.

 

Any ideas?

Regards,

Jeff Long, President
AutomationWorks, Inc.
http://www.automationworks.com
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Perhaps you're exceeding the width of the FIFO.  How many bits are each of your FXP numbers in this cluster?  Do you get the same error if you make each FXP number 32 bits, so the cluster will be 64 bits wide?

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Hi Kyle.

 

I changed from a cluster of two FXPs to sending the two values through sequentially.  This worked just fine for me, so I moved on.

 

One thing I forgot to mention in my previous post is that this is a target-to-host FIFO, which I think brings in some additional limitations as to data type.  For instance the FXPs come through as integers, without any error or warning that the data is being clipped.  Perhaps clusters are not allowed in target-to-host FIFOs, but I never saw that documented anywhere.  Is there a document that clearly describes what datatypes can be handled by the different types of FIFOs? 

 

I learned how to convert my FXP to U32 via number-to-Boolean and Boolean-to-number conversions via the knowledgebase, but if that hadn't been posted I'd have spent a whole bunch more time working this out.

 

It would be a good idea for NI to modify the FPGA FIFO nodes to not accept datatypes that they cannot properly transfer.  Since the FIFO type is declared in the project, it seems this modification should be possible.  As it is, the FIFO properties wizard allowed me to specify that the FIFO is target-to-host and the datatype is FXP, which is clearly not a valid combination.

 

Thanks.

 

Jeff.

Regards,

Jeff Long, President
AutomationWorks, Inc.
http://www.automationworks.com
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The FIFO sholud be able to handle any datatype, as long as the sum of the data widths of all items in a custom control is not greater than the Maximum Data Width for DRAM.  The data type you select for the DRAM memory cannot be wider than the data width.  This is stated in the help for the FIFO customization screen, and I think this is why you were running into that error.  Hopefully everything's continued smoothly for you.

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