08-01-2013 05:22 AM
Hello All,
I followed this link https://decibel.ni.com/content/docs/DOC-8753 to embed Microblaze on to Virtex 5 FPGA of PXI-7853r module.
While compiling TopVI containing microblaze port in a single cycle timed loop I am getting following error:
LabVIEW FPGA: The compilation failed due to a xilinx error.
Details:
ERROR:HDLCompiler:806 - "C:/NIFPGA/jobs/MC19M1Q_r41egX9/mbnilabs1_wrapper.vhd"
Line 2: Syntax error near "ADDRESS_MAP".
INFO:HDLCompiler:1061 - Parsing VHDL file
"C:/NIFPGA/jobs/MC19M1Q_r41egX9/toplevel_gen.vhd" into library work
ERROR:ProjectMgmt - 1 error(s) found while parsing design hierarchy.
WARNING:ProjectMgmt - Circular Reference:
work:Architecture|NiFpgaPipelinedOrGateTreeSlv|rtl
INFO:TclTasksC:2116 - The automatic calculation of top has been turned-off.
Please set the new top explicitly by running the "project set top" command.
To re-calculate the new top automatically, set the "Auto Implementation Top"
property to true.
Started : "Synthesize - XST".
Running xst...
Command Line: xst -intstyle ise -ifn "C:/NIFPGA/jobs/MC19M1Q_r41egX9/toplevel_gen.xst" -ofn "C:/NIFPGA/jobs/MC19M1Q_r41egX9/toplevel_gen.syr"
Reading design: toplevel_gen.prj
INFO:Xst - Part-select index evaluated to out of bound value may lead to incorrect synthesis results; it is recommended not to use them in RTL
=========================================================================
* HDL Parsing *
=========================================================================
WARNING:Xst:2838 - Path definition '$XILINX/verilog/xst/nt/cpld_det_ver' in file C:/NIFPGA/programs/Xilinx13_4/ISE/vhdl/xst/nt/hdc.ini is invalid and being ignored. Check the path and ensure that any environment variable specification is legal.
WARNING:Xst:2838 - Path definition '$XILINX/verilog/xst/nt/unimacro_ver' in file C:/NIFPGA/programs/Xilinx13_4/ISE/vhdl/xst/nt/hdc.ini is invalid and being ignored. Check the path and ensure that any environment variable specification is legal.
WARNING:Xst:2838 - Path definition '$XILINX/verilog/xst/nt/unisim_ver' in file C:/NIFPGA/programs/Xilinx13_4/ISE/vhdl/xst/nt/hdc.ini is invalid and being ignored. Check the path and ensure that any environment variable specification is legal.
Parsing VHDL file "C:\NIFPGA\jobs\MC19M1Q_r41egX9\PkgNiUtilities.vhd" into library work
Parsing package <PkgNiUtilities>.
Parsing package body <PkgNiUtilities>.
.
.
.
.
.
ERROR:HDLCompiler:104 - "C:\NIFPGA\jobs\MC19M1Q_r41egX9\NiLvFpgaClipContainer.vhd" Line 31: Cannot find <mbnilabs1_wrapper> in library <work>. Please ensure that the library was compiled, and that a library and a use clause are present in the VHDL file.
ERROR:HDLCompiler:854 - "C:\NIFPGA\jobs\MC19M1Q_r41egX9\NiLvFpgaClipContainer.vhd" Line 21: Unit <clipcontainer_vhdl> ignored due to previous errors.
VHDL file C:\NIFPGA\jobs\MC19M1Q_r41egX9\NiLvFpgaClipContainer.vhd ignored due to errors
-->
Total memory usage is 179412 kilobytes
Number of errors : 2 ( 0 filtered)
Number of warnings : 6 ( 0 filtered)
Number of infos : 1 ( 0 filtered)
Process "Synthesize - XST" failed
Compilation Time
Can anyone help me in this....or put some light on it.
Any help will be highly appreciated.
Many thanks in advance.
skhilar
08-01-2013 09:32 AM
skhilar,
which of the two versions have you tried?
Please note that in V1 you need the Xilinx ISE/EDK and i honestly don't know if these are part of the Xilinx toolchain included in the LV FPGA module.
Also reading the comments in the community page indicate that newer versions of the Xilinx toolchain could induce issues, so please verify the version.
Norbert
08-02-2013 07:48 AM
Hello Norbert,
I am using MB-NILabsV2.
I have Xilinx ISE/EDK tools of version 14.4 which are used to generate Microblaze core and for SDK purpose.
While selecting FPGA Vitex5 LX85 there is no where mention of its package (either ff676 or ff1153) in NI documentation.
Thanks
Skhilar
06-10-2015 09:55 PM
Hi Skhilar,
I am currently trying to get a Microblaze soft-core onto an NI FPGA.
I have an old PXI-7953R, which has a Virtex-5 LX85, I know the specifications for this chip are:
Virtex xc5vlx85
Package: ff676
Speed Grade: -1
I found this information by right-clicking on the target from an NI project and by selecting properties.
Here is another data sheet you can look at:
http://www.xilinx.com/products/silicon_solutions/fpgas/virtex/virtex5/Virtex-5_LX_Product_Table.pdf
I have LabVIEW 2014 SP1 installed an I am trying to figure out which version of Coregen to use and which version of the Xilinx SDK to use.
06-17-2015 02:16 PM
Hi all, I was able to run a simple MicroBlaze application on my 7953R board using a MicroBlaze Softcore Processor.
If anybody is having any issues, please contact me and soon I will put this on a github repository.
-John