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Dynamic duty ratio update in every cycle in PWM

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Hi All,

 

I am a LabVIEW newbie working on generating PWM signal. I have to generate a PWM signal such that its duty ratio and in effect the pulse width should change in every cycle based on the values stored in an excel sheet. I have downloaded a ni example and trying to modify it but not with much success. I am using NI PCI 6132 and BNC 2110 in my setup.

 

I have read examples about generating PWM based on dynamic duty ratio by manual control using 1,2 counters but have not found anything which updates the duty ratio in every cycle.

 

For an example I am attaching a csv file containing 4 duty ratio values and the vi. My aim is to generate 4 pulses with the duty ratio stored in the csv file and then stop the execution of the program. For the starters I am keeping the frequency as 1 Hz. I know the vi is not proper and I am working on it, but I thought to get some suggestions in the meanwhile.

 

Thank you very much for your help.

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Accepted by topic author Navy_B
08-27-2015 04:09 PM

The 6132 counters can't do what you are asking.  Using this hardware you would need to build the appropriate digital output array based on your desired times and use a buffered digital output task:

 

DigOutputArray.png

 

 

 

Newer STC3-based hardware (e.g. PCIe-6320) is capable of buffered counter outputs:

 

COBuffered.png

 

 

There are a few downsides to using the digital output method that may or not be an issue for your application:

 

1.  It requires a much larger buffer (1 byte per sample compared to 8 bytes per period).  If you need high timing resolution and need to output a long sequence of pulses you might not be able to write the entire buffer at once.

 

2.  More data needs to be streamed across the bus (also 1 byte per sample compared to 8 bytes per period).  Might be an issue if you are running concurrently with other streaming applications.

 

3.  Less timing resolution (10 MHz max output frequency on the 6132 compared to 100 MHz counter output timebase on an X Series).

 

 

 

Best Regards,

John Passiak
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When I first discovered the buffered output on counters I was so excited I made a frequency/duty cycle sweep using one.

 

https://decibel.ni.com/content/docs/DOC-32352

 

That was using the built in PFI0 on a cDAQ-9188 but works on other counters.


@John_P1 wrote:

The 6132 counters can't do what you are asking.  Using this hardware you would need to build the appropriate digital output array based on your desired times and use a buffered digital output task:

 

 

Newer STC3-based hardware (e.g. PCIe-6320) is capable of buffered counter outputs: 

 


I understand the difference between a single sample and N samples for counters.  How can you tell looking at the data sheet that a counter is or isn't capabile of N samples?


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@Hooovahh wrote:

 

I understand the difference between a single sample and N samples for counters.  How can you tell looking at the data sheet that a counter is or isn't capabile of N samples?


 

After looking into it for a few minutes, I honestly have no idea.  The individual product pages and spec sheets don't have any info about it (I thought the phrases "dynamic updates" in the spec page and "buffered operations" under the counter section of the spec summary on the product page sounded promising, but old hardware allows "dynamic updates" through software-timed calls and allows "buffered operations" for counter inputs so these phrases do nothing to distinguish whether or not a piece of hardware supports buffered counter outputs).

 

I do know the user manuals have a good deal of information about buffered counter outputs (whereas the old products which don't support the feature don't mention it at all in their user manuals), so if you're interested in the counter features of any particular hardware family I'd suggest consulting the user manual.

 

 

Really this feature seems like it ought to be better marketed.  If you're looking for a quick summary, DAQmx products which support buffered counter outputs should be limited to the following currently:

 

    • cDAQ chassis (other than the legacy 9172 chassis and 916x single-module carriers).
    • X Series (63xx).
    • The 6612 and 6614 Counter/Timer boards (the older 660x and 6624 Counter/Timer boards do NOT support buffered counter outputs)

 

 

Best Regards,

John Passiak
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Thank you John for the reply. In my application I will need 100ns resolution so 10 MHz is just on the edge. Also the buffer in 6132 is 16 MS so that should be sufficient to hold the entire sequence. Thanks again. I will try to go through the vi you posted and try to build my application around it.

 

Navy

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@John_P1 wrote:

Really this feature seems like it ought to be better marketed.  If you're looking for a quick summary, DAQmx products which support buffered counter outputs should be limited to the following currently:

 

    • cDAQ chassis (other than the legacy 9172 chassis and 916x single-module carriers).
    • X Series (63xx).
    • The 6612 and 6614 Counter/Timer boards (the older 660x and 6624 Counter/Timer boards do NOT support buffered counter outputs) 

One other thing I'd like to add is you can't tell if your hardware supports this using simulation (yet another flaw in this feature).  I simulated a PCI-6225 then tried to write a buffered counter output and I got no errors.  I then went to a system where I have a physical 6225 and when I ran the write function I got an error saying that you can only write to a counter after a task is started, making me believe this hardware doesn't support the buffered counter output.


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@Hooovahh wrote:
One other thing I'd like to add is you can't tell if your hardware supports this using simulation (yet another flaw in this feature).  I simulated a PCI-6225 then tried to write a buffered counter output and I got no errors.  I then went to a system where I have a physical 6225 and when I ran the write function I got an error saying that you can only write to a counter after a task is started, making me believe this hardware doesn't support the buffered counter output.

 

I don't work for NI (although I have in the past), but I do agree.  The 6225 does indeed not support buffered counter output.

 

 

 

Best Regards,

John Passiak
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@Navy_B wrote:

Thank you John for the reply. In my application I will need 100ns resolution so 10 MHz is just on the edge. Also the buffer in 6132 is 16 MS so that should be sufficient to hold the entire sequence.  


You're referring to the analog input FIFO (the digital output FIFO is actually only 2044 bytes according to the specs).  

 

The FIFO size doesn't really matter though, the buffer is large enough to sustain 10 MHz streaming from the PC buffer (when you call DAQmx write it actually writes data to the PC buffer and then data is streamed to the hardware FIFO as it is needed).  So really your only limiting factor is however much memory you are able to use which is likely much more than 16 MS anyway.

 

 

Best Regards,

John Passiak
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Hello John,

 

I was able to generate the pulses using the vi you posted above. The only change in the vi I had to make was to give the timebase input to DAQmx Timing block. I was able to modify the vi to get the input from spreadsheet.

 

I more question I have is the digital line outputs go below the ground level and above the 5 V level. Infact they are going to around -5V to 8V while switching. Is this normal for digial channel outputs?

 

I have attached an image showing the same.

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I mostly work with newer NI hardware and don't see nearly as much overshoot/undershoot as what you have linked.  It seems the 6132 is going to require some external termination, but I'm not sure of what NI would recommend (I don't have one available myself to test anything out).

 

I do know that the 6533 and 6534 are from the same era and have a similar problem, so you might find this KnowledgeBase helpful for a starting point.

 

 

Best Regards,

John Passiak
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