Does a "subroutine priority" mean anything in an FPGA?

[WNM]

Since a programmed FPGA is a collection of hardware logic strung together with potentially a great deal of it in parallel, does setting the execution priority properties of FPGA subVIs to "subroutine" really do anything? If you read the description of what a subroutine priority does, it says it devotes all the resources of an execution thread to the subroutine code. This to me implies time sharing of resources. But I don't think time-shared execution threads exist in an FPGA, or do they? Do any of the other possible execution priority levels mean anything to FPGA code?

[nathand · Accepted solution]

Execution priorities have no effect in FPGA. Every subVI that does not require arbitration (ie, is either reentrant or used only once) is inlined into the main VI at compile time. As far as I know, execution priority has no effect on arbitration for those subVIs that do require it.

[WNM]

Thank you. That's pretty much what I suspected but I had not yet found words to that effect.