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Does PXI-6115 in PXI-1031 chassis using RDA support Buffered Digital Input?

I'm trying to get the PXI-6115 device in the PXI-1031 Chassis that is communicating with my PC using RDA to provide buffered digital input on the 8 Digital lines as one port.  RDA requires traditional DAQ.
 
Is this possible with this device? 
 
I keep getting error -10687 when it gets to the read step.
Ryan Vallieu CLA, CLED
Senior Systems Analyst II
NASA Ames Research Center
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Forgot to mention the LV version is 7.1
Ryan Vallieu CLA, CLED
Senior Systems Analyst II
NASA Ames Research Center
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RVallieu,

This should work just fine on your S Series device. At what rate are you attempting to read data. For a continuous acquisition, the upper limit will be in the tens of kilohertz. Have you tried using any of the LabVIEW shipping examples? From LabVIEW's Example Finder (Help->Find Examples), try the "CDI Single Point clocked by Counter (E).vi" example. For a continuous example, try the "Continuous CDIO with AIO (E).vi" VI. Please let us know if you still get the error.

Hope this helps,
Ryan Verret
Product Marketing Engineer
Signal Generators
National Instruments
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Thanks for the Example - I was trying to find one that applied to the S-6115 - The mistake I was making was trying to use the DAQ Route Signal instead of the Param VI to route my AI trigger signal.
 
The DI is now following the AI perfectly.
 
***** for you!
Ryan Vallieu CLA, CLED
Senior Systems Analyst II
NASA Ames Research Center
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Thanks RVallieu!
Ryan Verret
Product Marketing Engineer
Signal Generators
National Instruments
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Of course though, the fact that the 6115 has only 3 DMA channels just bit me, since I want to use the AI, DI, and POSSIBLY both counters....
 
It works for now, as the required bandwidth is lower than the maximum I can read using the interrupts for the 2nd counter.
 
Unless....Am I mistaken in my understanding that the counters have to be set up individually on the 6115?
 
 
Ryan Vallieu CLA, CLED
Senior Systems Analyst II
NASA Ames Research Center
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RVallieu,

You are correct about having to use1 DMA per counter, and setting them up individually. If you don't require simultaneous sampling, an M Series might be better (6 DMA), but not compatibale with Traditional NI-DAQ. If you want to stay with RDA, then a low cost counter board may be a better bet.

Hope this helps,
Ryan Verret
Product Marketing Engineer
Signal Generators
National Instruments
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OK - now which example will show me how to synchronize multiple PXI-6115 cards in one chassis with each other?

Seems I can't use the PXI Star example.

Ryan Vallieu CLA, CLED
Senior Systems Analyst II
NASA Ames Research Center
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I found the example Two E-Series Shared ScanClk.vi which says it will work for 2 PXI-6115 cards - so I am going to try that out.  My example finder wouldn't open the VI though - had to download from NI.com
Ryan Vallieu CLA, CLED
Senior Systems Analyst II
NASA Ames Research Center
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Look at that it worked.  Just needed to remove the Channel Clock with the Clock Config code from the VI and only use the Clock Config to set the slave clock to time off the RTSI line.
 
Woohoo!
Ryan Vallieu CLA, CLED
Senior Systems Analyst II
NASA Ames Research Center
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