02-25-2016 01:06 AM
Solved! Go to Solution.
02-25-2016 02:11 AM
02-25-2016 02:36 AM
Hi GerdW,
That is definately easy, thanks!
However, what do you think about the other ones? Anyone?
Thank you!
02-25-2016 02:56 AM
02-25-2016 07:50 AM - edited 02-25-2016 07:52 AM
I had to do arbitrary waveform generation on FPGA.
The DDS block as implemented uses a constant array for the look up table.
I used an FPGA memory block for the LUT and updated it as required from the RTHost using a DMA FIFO.
Then just wrote my own DDS algorithm on FPGA, it isn't that difficult. You could learn from the sine wave generator express vi.
If you have to output multiple waveforms you can just use multiple memories and share the addressing.
02-25-2016 08:12 AM
Hi WillD,
Sorry if I didn't explain myself well. I ignored in my explanation the fact that the sinewave is already generated, by the DDS Compiler 6.0 Xilinx IP block, and also that I need to achieve one sample/tick generation, placing the code inside an SCTL.
The DDS Compiler offers me the signal generator I need, and lets me vary the output signal frequency the way I want, but it does not support other waveforms rather than sine or cosine, and I would love to generate a sawtooth and triangle using the same mechanism.
So if I could perform small changes on the output of the DDS Compiler I would get a handy signal generator that could output different waveforms at very different frequencies, at requested.
Thank you!