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Component-level IP (CLIP) supports only .xci files created by Vivado 2017.2.

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I have a Labview FPGA project where I have added a CLIP containing several Xilinx IP. Lastly I get the following error message just as I tried to add a new IP to the CLIP:

Component-level IP (CLIP) does not support the following .xci file, because this file is created by an old version of Xilinx compilation tools.
C:\... \fichier.xci
Component-level IP (CLIP) supports only .xci files created by Vivado 2017.2.

 

It was really confusing, not just because my file was created by a newer version of Vivado, but because many other IP in my project are created by newer versions of Vivado, and well accepted. I found the following page about this error, but it does not help

 

http://zone.ni.com/reference/en-XX/help/372614J-01/lvfpgahelp/fpga_error_codes_codegen/ 

 

I finally installed Vivado 2017.2 on my PC, but I can not understand why I did not get this error for other IPs.

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Which version of LabVIEW are using? Which version of LabVIEW were you porting things from?

 

Could be the components called by the IP blocks were not forward compatible?


Certified LabVIEW Architect, Certified Professional Instructor
ALE Consultants

Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
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Sorry, I forgot the references:

LabVIEW 2019, Version 19.0.1f1 (64-bit) (which compile with Vivado 2017.2)

Several IPs from Vivado 2019.1 (64-bit) are accepted,

also possibly from Vivado 2018.1.

 

The last IP was of a different type than the others, so you mean I was just lucky that the other IPs where accepted? By chance they are compatible?

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Solution
Accepted by tcachat

You have to stay with the Vivado version from NI's site as per: https://www.ni.com/en-us/support/documentation/compatibility/19/compatibility-between-xilinx-compila...

 


Certified LabVIEW Architect, Certified Professional Instructor
ALE Consultants

Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
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All right, but still it is not clear why I did not get this error for other IPs.

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I'm also facing the similar issue except that instead of generating, I have acquired CLIP and its associated files (xml, xci, and vhd) from a third-party source. And now I'm confused how to recompile/regenerate .xci file on Vivado2017.2 version.

 

Please advice. Any help will be really appreciated.

Thanks

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I would advice you to start a new thread, because:

  • this one is closed, and
  • your issue might be slightly different.

Nevertheless, I am not very familiar with this forum. In a new thread, I would also recommend to mention the different software versions. I do not know whether the xml, xci or vhdl files mention the Vivado version.

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Thank you for the suggestion. 

 

You can find the new thread here.

 

and yes, I couldn't find the version of these files but from the error it sounds like they were created from an old xilinx compilation tool.

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