When I open, or try to run a vi I get this message about 8-9 times,
Compiler error. Report this problem to National Instruments Tech Support.
Unexpected conversion. src type=112, dst type=7
This program is meant to be used on a cRIO system in Real time.
I am using Windows 7, Labview 2011.
This is a rather complex vi, and not yet finished, but here it is along with an image of the error message.
I think that the destination type is an unsigned long integer, while I am not sure about the source type. I have tried to find the instances that tries to convert a data type to an unsigned long integer. I may have missed a few, or I may be chasing my tail.
You say you get this error message right away when you just open the VI? Or is it only when you try to deploy it and run it on your target?
What cRIO and other hardware are you using in your setup?
I think it will be a matter of trying to figure out where there are some incompatible types are wired together. Is the arrow to run the VI a solid arrow? If it is a broken arrow, you should be able to have it show you exactly where the error is coming up.
Hope we can figure this out soon!
I get this message right when I open the vi, or whenever I compile this vi. This vi calls a vi on the FPGA which is onboard the chassis.
The hardware that I am using is:
NI 9401 (DIO module)
NI 9205 (Analog Module)
The arrow is broken, but only says that the vi failed to compile. This does not point me to anything.
I have gone through each part of the code to try to find the culprit. It seems that in my FPGA call (read/write control) I select which channel on the modules to either ouput or read with my FPGA. If I take this portion out of my code, then the error stops and I can run my vi. I've since modified the FPGA code to handle this differently, but I feel like this is not the correct solution, just ignoring the problem.
So my question is: Is it possible to select a FPGA I/O channel from the cRIO vi? If I try, I get an error indicating that I have incompatible type wired up. Although I have copy and pasted directly the channels from my FPGA vi to my vi on the cRIO.
The use of FPGA I/O Nodes is limited to the FPGA-level VI only. Trying to use these nodes to access FPGA-level I/O from an upper-level host VI will result in an error. The proper method for accessing those I/O channels is to use the FPGA Read/Write Control.