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CRC-16 SI-M Communication Card, Modbus RTU

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I am trying to write the CRC-16 Generation Procedure for the SI-M Communication Card from TECO Electric and Machining Company.  Here is the algorithm they provide for generating the CRC-16 word (attached is my attempt to implement it, I welcome any suggestions).  This is verbatim:


A.  Load a 16-bit register with FFFFH.  Call this the CRC register.


B.  Exclusive OR the first 8-bit byte of the message with the low order byte of the 16-bit CRC registers, putting the result in the CRC register.


C.  Shift the CRC register one bit to the right (toward the LSB), zero filling the MSB.  Extract and examine the LSB.


D.  If LSB is 0, repeat procedure C (another shift).  If LSB is 1, Exclusive OR the CRC register with the polynomial value A001H.


E. Repeat procedure C, D until eight shifts has been performed.  Wile this is done, a complete byte will have been processed.


F. Repeat procedure B-E to the follwing byte of the message until all bytes of the message is processed.


G. When the CRC is placed into the message, it upper and lower bytes must be swapped.



If anyone understands this please feel free to tell me where I went wrong (see attached).



Message Edited by jmcbee on 02-05-2009 03:25 PM
Message Edited by jmcbee on 02-05-2009 03:31 PM
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Message 1 of 16

This link won't help you to fix your code, but it's a simplier algorithm that is more efficient because it's table-driven - and it will give the result you need.



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Accepted by jon_mcbee



I've attached a vi that is included with the LV Modbus library.  It should get you the answer.

Message 3 of 16
Mike and Centerbolt thank you both for your replies.  Centerbolt the VI you attached does the job, I am going to look through so I can understand where I went wrong with my attempt.  Mike than you for pointing me to that website, I was about to implement it when Centerbolt replied.  Kudos all around!
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The solution you linked to is very interesting.  I'm a gonna hafta try it out and compare performance the bitbanger version.

Message 5 of 16



It looks like in your attempt you did shifts until the the carry out was 1, did the XOR with A001, then repeated that 8 times.  So you could have theoretically much more than 8 shifts for a given byte.


In Centerbolt's,  the shift occurred 8 times total, and the XOR with A001 only occurred when the carryout of the shift was 1.


When I was looking at it last night it seemed like what you were doing matched the description.  The only error I saw was that it looked like you were swapping bytes in the very beginning with the split and join functions.  But after seeing Centerbolt's I see that it more accurately matches the description.  The written description was just unclear enough that what you did seemed perfectly legitimate.


I'm glad it's working for you now.

Message 6 of 16

Thanks for the reply Ravens Fan.  This is my first venture into Modbus communication and I knew that inexperience was going to hurt, especially when it comes to interpretting a poorly written CRC-16 algorithm.  Luckily  I had access to the best minds in this type of work and figured that someone here would have the experience I lacked.  As usual I was not dissapointed.  I love this forum!

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Message 7 of 16



Table scheme seems to work well.  Just don't ask me to explain how it works.  Smiley Very Happy  Thanks again for the link.




I've attached a vi I put together to compare the two schemes to generate CRC-16 for Modbus.

Message 8 of 16



Thanks to the vi you have posted last piece of my CRC table driven puzzle has been solved!!





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Message 9 of 16

I want table based CRC-16 generator in 7.1 if you can convert and give it will be gr8.





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