32bit Wait Unitl Sychronization in Usec

[Tim]

Does anyone have any experience with the Wait Until 32bit usec VI?

I am trying to get this VI to synchronize on a 25000 usec time division.
but it vacillates from 17000 usec to 33000 usec. I am using the Counter/Timer
6602 running on a RT Engine utilizing RT 7.1 code to make my time measurements. When I set the properties of the "Wait Unitll" at a 32 bit ms mode it seems to wait close to 25 ms or 25000us.

What is the deal with the 32 bit usec mode. Has anyone seen problems with this before?
Can I trust what I am recording?

thx

[Kevin_Price]

Tim,

Sorry, no answer for you, but you might think about posting this over on the forum dedicated to RT...

-Kevin P.

[Tim]

thx, i will do that.

[A.S.]

Hi Tim,
When you use the usec resolution on any of the Wait functions, an onboard hardware counter is used as a reference (this is only true for Pentium III/4 PXI RT devices). If you use the msec resolution, it uses the RTOS clock, which is software based. Based on this, the hardware clock (usec) thus has much lesser jitter, whereas the msec clock will see a larger jitter. The msec clock is directly affected by CPU consumption, etc.

The behavior you are seeing is actually contrary to what would be expected when using the usec clock. The only reason you may see some issues using the usec clock, as you are, is if you are not using a valid PXI controller that supports this functionality. Which PXI controller are you using? In LabVIEW, try using the NI Timestamp Code Timer.vit template to benchmark your code and see if you see similar behavior.

Hope this helps.

A Saha
Applications Engineer
National Instruments