Provide the ability to open the master VI directly when a subVI is set to be reentrant

[gsussman]

When working with reentrant VIs, every time you double click an instance of a reentrant vi on the block diagram, the cloned instance is opened. This is fine during debugging but during development when you want to modify the actual code this requires that you open a clone, then CTRL+M to open the actual master vi. Much more frustrating if you have to dig several VIs deep through a highly reentrant hierarchy.

We have CTRL+RT Click to open the block diagram directly, how about something like ALT+RT Click to open the master VI instead of the clone.

Under normal development this is not such an issue but if you happen to be working with LV FPGA, just about everything is reentrant.

[jlokanis]

Use shared clones and this will not happen to you.  There are very few good reasons to use preallocated clones anymore.  NI really should make shared clones the default.

[gsussman]

I agree wholeheartedly, however when working with LV FPGA, shared clones can lead to timing and or utilization issues.

[hfettig]

If you do have to use preallocated clones, pressing Ctrl-M on the clone's front panel will open its master VI.

[gsussman]

That is the point. I work quite a bit in LV FPGA. Under FPGA almost every single vi is reentrant using preallocated clones. When I start to dig into a block diagram the process goes something like this...

CTRL+Double click on the sub VI (front panel and block diagram of clone opened)

CTRL+M (Open front panel of master)

CTRL+E (Open block diagram of master) 

I now have 4 windows open when all I really need is 2.

If you happen to have many windows open already, the clone FP and BD windows easily become mixed into the already open windows and lead to extra desktop clutter.

[AristosQueue (NI)]

> I agree wholeheartedly, however when working with LV FPGA,

> shared clones can lead to timing and or utilization issues.

Untrue, according to FPGA developers that I just asked. When downloading a VI to FPGA, shared clone reentrancy is treated the same as preallocated clone reentrancy. 

[Manzolli]

How about this: when the program is running (even paused by a debug issue), it opens the clone, if not, opens the master. I can imagine just a few necessities of opening the clone while the program is not running. I never needed.

[Darren]

Any idea that has received less than 8 kudos within 8 years after posting will be automatically declined.