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Home Community Idea Exchange LabVIEW FPGA Ideas

LabVIEW FPGA Idea Exchange

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61 Kudos
Intaris

Change the font in the Xilinx Log window to fixed width

Status: Completed Submitted by Proven Zealot Proven Zealot on 07-24-2014 07:42 AM 3 Comment

Xilinx log window should use a fixed-width font.

 

Which of these two string indicators with identical content is easier to read?

 

FPGA Xilinx Log font.png

 

Spoiler
The one on the left is Courier, the one on the right is the default Application font
4 Kudos
MarcoMauri

Multiple Compile Servers

Status: Completed Submitted by Active Participant on 05-14-2010 02:35 AM 2 Comment

I would suggest to implement the possibility to use at the same time multiple compile servers.

Imagine you have a project with many FPGA targets: it would be useful to send the FPGA vis to compilers working in paraller (a sort of Compiler Farm....).

 

Cheers,

Marco

 

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1 Kudos
gsussman

Prompt the user when an FPGA compile has completed

Status: Completed Submitted by Active Participant on 11-19-2010 01:13 PM 1 Comment

I know that when connected to the compile server the local compile status window will show you when a compile is done, however that does seem to severely limit productivity in that the only way you can get back to working in LV is to disconnect from the compile server. The downside is that you don't get any feedback as to when your compile has completed. This is especially true if your compile server is running on a remote machine.

 

Why not add a feature to LabVIEW to allow disconnecting from the compile server but still provide a background polling feature to update the user when the compile has completed. Something as simple as a dialog box telling me that my compile is ready would be great. It would allow me to get back to work on other sections of the code while still closing the loop on the running FPGA compile process and alerting me that it is done.

 

If the system polled once every minute or so that would be more than adequate.