On the cRIO-9068, the third serial port and the second Ethernet adapter is actually mounted on the FPGA, resources are consumed to redirect to realtime. Currently there are no access to this resource on the FPGA for developers, only from the Realtime.
I would like some I/O Nodes for interacting with these devices on the FPGA. NI could put up some examples how they could be used.
Today the resources are invisible to the developer, except for the additional long compile time and resources used (about 7%).
I attached pictures of the FPGA design and the resources consumed for a blank vi.
Sincerly,
Jens Eriksen